Divide and Compact - Stochastic Space Compaction for Faster-than-At-Speed Test
A. Sprenger, S. Hellebrand, Journal of Circuits, Systems and Computers 28 (2019) 1–23.
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Journal Title
Journal of Circuits, Systems and Computers
Volume
28
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1
Page
1-23
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Sprenger A, Hellebrand S. Divide and Compact - Stochastic Space Compaction for Faster-than-At-Speed Test. Journal of Circuits, Systems and Computers. 2019;28(1):1-23. doi:10.1142/s0218126619400012
Sprenger, A., & Hellebrand, S. (2019). Divide and Compact - Stochastic Space Compaction for Faster-than-At-Speed Test. Journal of Circuits, Systems and Computers, 28(1), 1–23. https://doi.org/10.1142/s0218126619400012
@article{Sprenger_Hellebrand_2019, title={Divide and Compact - Stochastic Space Compaction for Faster-than-At-Speed Test}, volume={28}, DOI={10.1142/s0218126619400012}, number={1}, journal={Journal of Circuits, Systems and Computers}, publisher={World Scientific Publishing Company}, author={Sprenger, Alexander and Hellebrand, Sybille}, year={2019}, pages={1–23} }
Sprenger, Alexander, and Sybille Hellebrand. “Divide and Compact - Stochastic Space Compaction for Faster-than-At-Speed Test.” Journal of Circuits, Systems and Computers 28, no. 1 (2019): 1–23. https://doi.org/10.1142/s0218126619400012.
A. Sprenger and S. Hellebrand, “Divide and Compact - Stochastic Space Compaction for Faster-than-At-Speed Test,” Journal of Circuits, Systems and Computers, vol. 28, no. 1, pp. 1–23, 2019.
Sprenger, Alexander, and Sybille Hellebrand. “Divide and Compact - Stochastic Space Compaction for Faster-than-At-Speed Test.” Journal of Circuits, Systems and Computers, vol. 28, no. 1, World Scientific Publishing Company, 2019, pp. 1–23, doi:10.1142/s0218126619400012.
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