Divide and Compact - Stochastic Space Compaction for Faster-than-At-Speed Test

A. Sprenger, S. Hellebrand, Journal of Circuits, Systems and Computers (2019).

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Journal Article | Published | English
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Journal of Circuits, Systems and Computers
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Sprenger A, Hellebrand S. Divide and Compact - Stochastic Space Compaction for Faster-than-At-Speed Test. Journal of Circuits, Systems and Computers. 2019. doi:10.1142/s0218126619400012
Sprenger, A., & Hellebrand, S. (2019). Divide and Compact - Stochastic Space Compaction for Faster-than-At-Speed Test. Journal of Circuits, Systems and Computers. https://doi.org/10.1142/s0218126619400012
@article{Sprenger_Hellebrand_2019, title={Divide and Compact - Stochastic Space Compaction for Faster-than-At-Speed Test}, DOI={10.1142/s0218126619400012}, journal={Journal of Circuits, Systems and Computers}, author={Sprenger, Alexander and Hellebrand, Sybille}, year={2019} }
Sprenger, Alexander, and Sybille Hellebrand. “Divide and Compact - Stochastic Space Compaction for Faster-than-At-Speed Test.” Journal of Circuits, Systems and Computers, 2019. https://doi.org/10.1142/s0218126619400012.
A. Sprenger and S. Hellebrand, “Divide and Compact - Stochastic Space Compaction for Faster-than-At-Speed Test,” Journal of Circuits, Systems and Computers, 2019.
Sprenger, Alexander, and Sybille Hellebrand. “Divide and Compact - Stochastic Space Compaction for Faster-than-At-Speed Test.” Journal of Circuits, Systems and Computers, 2019, doi:10.1142/s0218126619400012.

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