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18 Publications
2016 | Conference Paper | LibreCat-ID: 138
Riebler H, Vaz GF, Plessl C, et al. Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems. In: Proceedings of International Forum on Research and Technologies for Society and Industry (RTSI). IEEE; 2016:1-5. doi:10.1109/RTSI.2016.7740545
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2015 | Conference Paper | LibreCat-ID: 238
Damschen M, Riebler H, Vaz GF, Plessl C. Transparent offloading of computational hotspots from binary code to Xeon Phi. In: Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE). EDA Consortium / IEEE; 2015:1078-1083. doi:10.7873/DATE.2015.1124
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2014 | Conference Paper | LibreCat-ID: 439
Vaz GF, Riebler H, Kenter T, Plessl C. Deferring Accelerator Offloading Decisions to Application Runtime. In: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig). IEEE; 2014:1-8. doi:10.1109/ReConFig.2014.7032509
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2014 | Conference Paper | LibreCat-ID: 377
Riebler H, Kenter T, Plessl C, Sorge C. Reconstructing AES Key Schedules from Decayed Memory with FPGAs. In: Proceedings of Field-Programmable Custom Computing Machines (FCCM). IEEE; 2014:222-229. doi:10.1109/FCCM.2014.67
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2014 | Conference Paper | LibreCat-ID: 1778
C. Durelli G, Pogliani M, Miele A, et al. Runtime Resource Management in Heterogeneous System Architectures: The SAVE Approach. In: Proc. Int. Symp. on Parallel and Distributed Processing with Applications (ISPA). IEEE; 2014:142-149. doi:10.1109/ISPA.2014.27
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2013 | Conference Paper | LibreCat-ID: 528
Riebler H, Kenter T, Sorge C, Plessl C. FPGA-accelerated Key Search for Cold-Boot Attacks against AES. In: Proceedings of the International Conference on Field-Programmable Technology (FPT). IEEE; 2013:386-389. doi:10.1109/FPT.2013.6718394
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2013 | Mastersthesis | LibreCat-ID: 521
Riebler H. Identifikation und Wiederherstellung von kryptographischen Schlüsseln mit FPGAs. Universität Paderborn; 2013.
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2013 | Mastersthesis | LibreCat-ID: 10730
Riebler H. Identifikation Und Wiederherstellung von Kryptographischen Schlüsseln Mit FPGAs. Paderborn University; 2013.
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