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326 Publications
2012 | Conference Paper | LibreCat-ID: 2106
B. Meyer, J. Schumacher, C. Plessl, and J. Förstner, “Convey Vector Personalities – FPGA Acceleration with an OpenMP-like Effort?,” in Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 2012, pp. 189–196, doi: 10.1109/FPL.2012.6339370.
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| DOI
2012 | Journal Article | LibreCat-ID: 2108
T. Schumacher, C. Plessl, and M. Platzner, “IMORC: An Infrastructure and Architecture Template for Implementing High-Performance Reconfigurable FPGA Accelerators,” Microprocessors and Microsystems, vol. 36, no. 2, pp. 110–126, 2012, doi: 10.1016/j.micpro.2011.04.002.
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2012 | Conference Paper | LibreCat-ID: 615
M. Happe, H. Hangmann, A. Agne, and C. Plessl, “Eight Ways to put your FPGA on Fire – A Systematic Study of Heat Generators,” in Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), 2012, pp. 1–8, doi: 10.1109/ReConFig.2012.6416745.
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2012 | Conference Paper | LibreCat-ID: 591
T. Kenter, C. Plessl, and H. Schmitz, “Pragma based parallelization - Trading hardware efficiency for ease of use?,” in Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2012, pp. 1–8, doi: 10.1109/ReConFig.2012.6416773.
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2012 | Conference Paper | LibreCat-ID: 609
M. Happe, A. Agne, C. Plessl, and M. Platzner, “Hardware/Software Platform for Self-aware Compute Nodes,” in Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS), 2012, pp. 8–9.
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2012 | Conference Paper | LibreCat-ID: 567
P. Barrio, C. Carreras, R. Sierra, T. Kenter, and C. Plessl, “Turning control flow graphs into function calls: Code generation for heterogeneous architectures,” in Proceedings of the International Conference on High Performance Computing and Simulation (HPCS), 2012, pp. 559–565, doi: 10.1109/HPCSim.2012.6266973.
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2012 | Conference Paper | LibreCat-ID: 612
C. Rüthing, M. Happe, A. Agne, and C. Plessl, “Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs,” in Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), 2012, pp. 559–562, doi: 10.1109/FPL.2012.6339370.
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2012 | Conference Paper | LibreCat-ID: 2180
T. Beisel, T. Wiersema, C. Plessl, and A. Brinkmann, “Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux,” 2012.
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2012 | Journal Article | LibreCat-ID: 2177
M. Grad and C. Plessl, “On the Feasibility and Limitations of Just-In-Time Instruction Set Extension for FPGA-based Reconfigurable Processors,” Int. Journal of Reconfigurable Computing (IJRC), 2012, doi: 10.1155/2012/418315.
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2011 | Conference Paper | LibreCat-ID: 2191
T. Kenter, C. Plessl, M. Platzner, and M. Kauschke, “Estimation and Partitioning for CPU-Accelerator Architectures,” in Intel European Research and Innovation Conference, 2011.
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2011 | Conference Paper | LibreCat-ID: 2195
M. Grawinkel, T. Schäfer, A. Brinkmann, J. Hagemeyer, and M. Porrmann, “Evaluation of Applied Intra-Disk Redundancy Schemes to Improve Single Disk Reliability,” in Proc. Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS), 2011, pp. 297–306.
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2011 | Conference Paper | LibreCat-ID: 2197
S. Gesing et al., “Granular Security for a Science Gateway in Structural Bioinformatics,” in Proc. Int. Workshop on Scientific Gateways (IWSG), 2011.
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2011 | Conference Paper | LibreCat-ID: 2199
S. Gesing et al., “A Science Gateway for Molecular Simulations,” in Proc. EGI User Forum, 2011, pp. 94–95.
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2011 | Book Chapter | LibreCat-ID: 2202
C. Plessl and M. Platzner, “Hardware Virtualization on Dynamically Reconfigurable Embedded Processors,” in Reconfigurable Embedded Control Systems: Applications for Flexibility and Agility, M. Khalgui and H.-M. Hanisch, Eds. Hershey, PA, USA: IGI Global, 2011.
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2011 | Conference Paper | LibreCat-ID: 2205
G. Birkenheuer et al., “MoSGrid: Progress of Workflow driven Chemical Simulations,” in Proc. of Grid Workflow Workshop (GWW), 2011, vol. 829.
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2011 | Conference Paper | LibreCat-ID: 2194
B. Meyer, C. Plessl, and J. Förstner, “Transformation of scientific algorithms to parallel computing code: subdomain support in a MPI-multi-GPU backend,” in Symp. on Application Accelerators in High Performance Computing (SAAHPC), 2011, pp. 60–63, doi: 10.1109/SAAHPC.2011.12.
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2011 | Conference Paper | LibreCat-ID: 2193
T. Beisel, T. Wiersema, C. Plessl, and A. Brinkmann, “Cooperative multitasking for heterogeneous accelerators in the Linux Completely Fair Scheduler,” in Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), 2011, pp. 223–226, doi: 10.1109/ASAP.2011.6043273.
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2011 | Conference Paper | LibreCat-ID: 656
M. Happe, A. Agne, and C. Plessl, “Measuring and Predicting Temperature Distributions on FPGAs at Run-Time,” in Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig), 2011, pp. 55–60, doi: 10.1109/ReConFig.2011.59.
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2011 | Conference Paper | LibreCat-ID: 2200
T. Kenter, M. Platzner, C. Plessl, and M. Kauschke, “Performance Estimation Framework for Automated Exploration of CPU-Accelerator Architectures,” in Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA), 2011, pp. 177–180, doi: 10.1145/1950413.1950448.
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2011 | Journal Article | LibreCat-ID: 2201
T. Schumacher, T. Süß, C. Plessl, and M. Platzner, “FPGA Acceleration of Communication-bound Streaming Applications: Architecture Modeling and a 3D Image Compositing Case Study,” Int. Journal of Recon- figurable Computing (IJRC), 2011, doi: 10.1155/2011/760954.
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2011 | Conference Paper | LibreCat-ID: 2198
M. Grad and C. Plessl, “Just-in-time Instruction Set Extension – Feasibility and Limitations for an FPGA-based Reconfigurable ASIP Architecture,” in Proc. Reconfigurable Architectures Workshop (RAW), 2011, pp. 278–285, doi: 10.1109/IPDPS.2011.153.
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2010 | Conference Paper | LibreCat-ID: 2218
M. Wewior et al., “The MoSGrid Gaussian Portlet - Technologies for the Implementation of Portlets for Molecular Simulations,” in Proc. Int. Workshop on Scientific Gateways (IWSG), 2010, pp. 39–43.
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2010 | Conference Paper | LibreCat-ID: 2219
S. Gesing et al., “Workflow Interoperability in a Grid Portal for Molecular Simulations,” in Proc. Int. Workshop on Scientific Gateways (IWSG), 2010, pp. 44–48.
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2010 | Conference Paper | LibreCat-ID: 2225
Y. Gao, D. Meister, and A. Brinkmann, “Reliability Analysis of Declustered-Parity RAID 6 with Disk Scrubbing and Considering Irrecoverable Read Errors,” in Proc. IEEE Int. Conf. on Networking, Architecture and Storage (NAS), 2010, pp. 126–134.
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2010 | Book Chapter | LibreCat-ID: 2233
N. R. Prasad et al., “Open Source Middleware for Networked Embedded Systems towards Future Internet of Things,” in Vision and Challenges for Realising the Internet of Things, H. Sundmaeker, P. Guillemin, P. Friess, and S. Woelfflé, Eds. European Commission, 2010, pp. 153–163.
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2010 | Conference Paper | LibreCat-ID: 2234
M. Bolte, M. Sievers, G. Birkenheuer, O. Niehörster, and A. Brinkmann, “Non-intrusive Virtualization Management Using libvirt,” in Proc. Design, Automation and Test in Europe Conf. (DATE), 2010.
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2010 | Journal Article | LibreCat-ID: 2235
A. Brinkmann, D. Battré, G. Birkenheuer, O. Kao, and K. Voß, “Risikomanagement für verteilte Umgebungen,” ForschungsForum Paderborn, vol. 13, no. 13, 2010.
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2010 | Conference Paper | LibreCat-ID: 2236
G. Birkenheuer et al., “Grid-Workflows in Molecular Science,” in Proc. of Grid Workflow Workshop (GWW), 2010, pp. 177–184.
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2010 | Conference Paper | LibreCat-ID: 809
G. Birkenheuer, A. Brinkmann, and H. Karl, “Risk Aware Overbooking for Commercial Grids,” in Job Scheduling Strategies for Parallel Processing - 15th International Workshop, JSSPP 2010, Atlanta, GA, USA, April 23, 2010, Revised Selected Papers, 2010, pp. 51–76.
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2010 | Conference Paper | LibreCat-ID: 2223
E. Lübbers, M. Platzner, C. Plessl, A. Keller, and B. Plattner, “Towards Adaptive Networking for Embedded Devices based on Reconfigurable Hardware,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2010, pp. 225–231.
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2010 | Conference Paper | LibreCat-ID: 2216
M. Grad and C. Plessl, “Pruning the Design Space for Just-In-Time Processor Customization,” in Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), 2010, pp. 67–72, doi: 10.1109/ReConFig.2010.19.
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| DOI
2010 | Conference Paper | LibreCat-ID: 2224
M. Grad and C. Plessl, “An Open Source Circuit Library with Benchmarking Facilities,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2010, pp. 144–150.
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2010 | Conference Paper | LibreCat-ID: 2220
D. Andrews and C. Plessl, “Configurable Processor Architectures: History and Trends,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2010, p. 165.
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2010 | Conference (Editor) | LibreCat-ID: 2222
T. P. Plaks et al., Eds., Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press, 2010.
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