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9785 Publications


2013 | Journal Article | LibreCat-ID: 10684
Kaufmann P, Glette K, Gruber T, Platzner M, Torresen J, Sick B. Classification of Electromyographic Signals: Comparing Evolvable Hardware to Conventional Classifiers. IEEE Transactions on Evolutionary Computation. 2013;17(1):46-63. doi:10.1109/TEVC.2012.2185845
LibreCat | DOI
 

2013 | Bachelorsthesis | LibreCat-ID: 10700
Knoop M. Behavior Models for Electric Vehicles. IWES Kassel; 2013.
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2013 | Bachelorsthesis | LibreCat-ID: 10720
Nofen B. Verbesserung Der Erkennungsrate Eines Systems Zur Klassifikation von EMG-Signalen Durch Den Einsatz Eines Hybriden Lagesensors. Paderborn University; 2013.
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2013 | Bachelorsthesis | LibreCat-ID: 10727
Pudelko D. Überquerung Der Styx - Betriebsparametervariation Und Fehlerverhalten Eines Platform FPGAs. Paderborn University; 2013.
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2013 | Mastersthesis | LibreCat-ID: 10730
Riebler H. Identifikation Und Wiederherstellung von Kryptographischen Schlüsseln Mit FPGAs. Paderborn University; 2013.
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2013 | Bachelorsthesis | LibreCat-ID: 10741
Sprenger A. MiBenchHybrid : Erweiterung Eines Benchmarks Um Hardwarebeschleunigung. Paderborn University; 2013.
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2013 | Bachelorsthesis | LibreCat-ID: 10743
Steppeler P. Beschleunigung von Einzelbild-Erkennungsverfahren Auf Datenfluss Basierenden HPC Systemen. Paderborn University; 2013.
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2013 | Conference Paper | LibreCat-ID: 10745
Toebermann C, Geibel D, Hau M, et al. Real-Time Simulation of Distribution Grids with high Penetration of Regenerative and Distributed Generation. In: Real-Time Conference. OPAL RT Paris; 2013.
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2013 | Conference Paper | LibreCat-ID: 10774
Ghasemzadeh Mohammadi H, Gaillardon P-E, Yazdani M, De Micheli G. A fast TCAD-based methodology for Variation analysis of emerging nano-devices. In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS). IEEE; 2013:83-88. doi:10.1109/DFT.2013.6653587
LibreCat | DOI
 

2013 | Conference Paper | LibreCat-ID: 10775
Gaillardon P-E, Ghasemzadeh Mohammadi H, De Micheli G. Vertically-stacked silicon nanowire transistors with controllable polarity: A robustness study. In: 2013 14th Latin American Test Workshop-LATW. IEEE; 2013:1-6. doi:10.1109/LATW.2013.6562673
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