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5711 Publications
2014 | Conference Paper | LibreCat-ID: 10621
Anwer, Jahanzeb, et al. “FPGA Redundancy Configurations: An Automated Design Space Exploration.” Reconfigurable Architectures Workshop (RAW), 2014, doi:10.1109/IPDPSW.2014.37.
LibreCat
| DOI
2014 | Bachelorsthesis | LibreCat-ID: 10627
Bockhorn, Arne. Echtzeit Klassifikation von SEMG Signalen Mit Einem Low-Cost DSP Evaluation Board. Paderborn University, 2014.
LibreCat
2014 | Conference Paper | LibreCat-ID: 10632
Boschmann, Alexander, and Marco Platzner. “A Computer Vision-Based Approach to High Density EMG Pattern Recognition Using Structural Similarity.” Proc. MyoElectric Controls Symposium (MEC), 2014.
LibreCat
2014 | Conference Paper | LibreCat-ID: 10633
Boschmann, Alexander, and Marco Platzner. “Towards Robust HD EMG Pattern Recognition: Reducing Electrode Displacement Effect Using Structural Similarity.” Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC), 2014.
LibreCat
2014 | Mastersthesis | LibreCat-ID: 10640
Brand, Marcel. A Generalized Loop Accelerator Implemented as a Coarse-Grained Array. Paderborn University, 2014.
LibreCat
2014 | Mastersthesis | LibreCat-ID: 10645
Damschen, Marvin. Easy-to-Use-on-the-Fly Binary Program Acceleration on Many-Cores. Paderborn University, 2014.
LibreCat
2014 | Conference Paper | LibreCat-ID: 10654
Glette, Kyrre, and Paul Kaufmann. “Lookup Table Partial Reconfiguration for an Evolvable Hardware Classifier System.” IEEE Congress on Evolutionary Computation (CEC), 2014.
LibreCat
2014 | Bachelorsthesis | LibreCat-ID: 10665
Hagedorn, Christoph. Entwicklung Einer Codegrößenoptimierten Softwarebibliothek Für 8-Bit Mikrocontroller in Netzunabhängigen Notleuchten. Paderborn University, 2014.
LibreCat
2014 | Conference Paper | LibreCat-ID: 10674
Ho, Nam, et al. “A Hardware/Software Infrastructure for Performance Monitoring on LEON3 Multicore Platforms.” 24th Intl. Conf. on Field Programmable Logic and Applications (FPL), 2014, pp. 1–4, doi:10.1109/FPL.2014.6927437.
LibreCat
| DOI
2014 | Conference Paper | LibreCat-ID: 10677
Ho, Nam, et al. “Towards Self-Adaptive Caches: A Run-Time Reconfigurable Multi-Core Infrastructure.” 2014 {IEEE} Intl. Conf. on Evolvable Systems (ICES), 2014, pp. 31–37, doi:10.1109/ICES.2014.7008719.
LibreCat
| DOI
2014 | Bachelorsthesis | LibreCat-ID: 10679
König, Fabian. EMG-Basierte Simultane Und Proportionale Online-Steuerung Einer Virtuellen Prothese. Paderborn University, 2014.
LibreCat
2014 | Mastersthesis | LibreCat-ID: 10701
Koch, Benjamin. Hardware Acceleration of Mechatronic Controllers on a Zynq Platform FPGA. Paderborn University, 2014.
LibreCat
2014 | Mastersthesis | LibreCat-ID: 10715
Mittendorf, Robert. Advanced AES-Key Recovery from Decayed RAM Using Multi-Threading and FPGAs. Paderborn University, 2014.
LibreCat
2014 | Bachelorsthesis | LibreCat-ID: 10732
Rüthing, Christoph. The Xilinx Zynq Architecture as a Platform for Reconfigurable Heterogeneous Multi-Cores. Paderborn University, 2014.
LibreCat
2014 | Dissertation | LibreCat-ID: 10733
Schäfers, Lars. Parallel Monte-Carlo Tree Search for HPC Systems and Its Application to Computer Go. Logos Verlag Berlin GmbH, 2014.
LibreCat
2014 | Conference Paper | LibreCat-ID: 10738
Shen, Cong, et al. “Optimizing the Generator Start-up Sequence After a Power System Blackout.” IEEE Power and Energy Society General Meeting (IEEE GM), 2014.
LibreCat
2014 | Conference Paper | LibreCat-ID: 10739
Shen, Cong, et al. “A New Distribution Network Reconfiguration and Restoration Path Selection Algorithm.” Power Systems Computation Conference (PSCC), IEEE, 2014.
LibreCat
2014 | Mastersthesis | LibreCat-ID: 10744
Surmund, Sebastian. Multithreaded Parallelization of Mechatronic Controllers on a Zynq Platform FPGA. Paderborn University, 2014.
LibreCat
2014 | Book | LibreCat-ID: 10756
I. Esparcia-Alc{\’a}zar, Anna, et al. Applications of Evolutionary Computation - 17th European Conference, EvoApplications. Vol. 8602, Springer, 2014.
LibreCat
2014 | Conference Paper | LibreCat-ID: 10764
Anwer, Jahanzeb, and Marco Platzner. “Analytic Reliability Evaluation for Fault-Tolerant Circuit Structures on FPGAs.” IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), IEEE, 2014, pp. 177–84, doi:10.1109/DFT.2014.6962108.
LibreCat
| DOI