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403 Publications


2010 | Conference Paper | LibreCat-ID: 2223
Lübbers E, Platzner M, Plessl C, Keller A, Plattner B. Towards Adaptive Networking for Embedded Devices based on Reconfigurable Hardware. In: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2010:225-231.
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2010 | Conference Paper | LibreCat-ID: 2224
Grad M, Plessl C. An Open Source Circuit Library with Benchmarking Facilities. In: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2010:144-150.
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2010 | Conference Paper | LibreCat-ID: 2226
Beisel T, Niekamp M, Plessl C. Using Shared Library Interposing for Transparent Acceleration in Systems with Heterogeneous Hardware Accelerators. In: Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP). IEEE Computer Society; 2010:65-72. doi:10.1109/ASAP.2010.5540798
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2010 | Conference Paper | LibreCat-ID: 2228
Kenter T, Platzner M, Plessl C, Kauschke M. Performance Estimation for the Exploration of CPU-Accelerator Architectures. In: Hammami O, Larrabee S, eds. Proc. Workshop on Architectural Research Prototyping (WARP), International Symposium on Computer Architecture (ISCA). ; 2010.
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2010 | Conference Paper | LibreCat-ID: 2206
Keller A, Plattner B, Lübbers E, Platzner M, Plessl C. Reconfigurable Nodes for Future Networks. In: Proc. IEEE Globecom Workshop on Network of the Future (FutureNet). IEEE; 2010:372-376. doi:10.1109/GLOCOMW.2010.5700341
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2010 | Journal Article | LibreCat-ID: 10605
Drzevitzky S, Kastens U, Platzner M. Proof-Carrying Hardware: Concept and Prototype Tool Flow for Online Verification. International Journal of Reconfigurable Computing. 2010;2010. doi:10.1155/2010/180242
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2010 | Mastersthesis | LibreCat-ID: 10614
Agne A. Virtuelle Speicherverwaltung Für Hardware Threads in Rekonfigurierbaren Systemen. Paderborn University; 2010.
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2010 | Mastersthesis | LibreCat-ID: 10629
Boschmann A. EMG-Basierte Ganganalyse. Paderborn University; 2010.
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2010 | Mastersthesis | LibreCat-ID: 10642
Breitlauch D. Evolvable Cache Controller. Paderborn University; 2010.
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2010 | Bachelorsthesis | LibreCat-ID: 10649
Dridger D. Soft Microprocessors with Tightly Coupled Application-Specific Coprocessors. Paderborn University; 2010.
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2010 | Bachelorsthesis | LibreCat-ID: 10657
Graf T. Parallelization of the UCT Algorithm on HPC-Clusters. Paderborn University; 2010.
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2010 | Conference Paper | LibreCat-ID: 10683
Kaufmann P, Englehart K, Platzner M. Fluctuating EMG Signals: Investigating Long-term Effects of Pattern Matching Algorithms. In: International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC). IEEE; 2010:6357-6360.
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2010 | Conference Paper | LibreCat-ID: 10686
Kaufmann P, Knieper T, Platzner M. A Novel Hybrid Evolutionary Strategy and its Periodization with Multi-objective Genetic Optimizers. In: IEEE World Congress on Computational Intelligence (WCCI), Congress on Evolutionary Computation (CEC). IEEE; 2010:541-548.
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2010 | Journal Article | LibreCat-ID: 10694
Kebschull U, Platzner M, Teich J. Selected papers from the 18th International Conference on Field Programmable Logic and Applications, FPL 2008 (editorial). IET Computers Digital Techniques. 2010;4(3):157-158. doi:10.1049/iet-cdt.2010.9044
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2010 | Mastersthesis | LibreCat-ID: 10697
Knieper T. Hybridization of Global Multi-Objective and Local Search Techniques. Paderborn University; 2010.
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2010 | Conference Paper | LibreCat-ID: 10699
Knieper T, Kaufmann P, Glette K, Platzner M, Torresen J. Coping with Resource Fluctuations: The Run-time Reconfigurable Functional Unit Row Classifier Architecture. In: IEEE Intl. Conf. on Evolvable Systems (ICES). Vol 6274. LNCS. Springer; 2010:250-261.
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2010 | Book Chapter | LibreCat-ID: 10704
Lübbers E, Platzner M. ReconOS: An Operating System for Dynamically Reconfigurable Hardware. In: Platzner M, Teich J, Wehn N, eds. Dynamically Reconfigurable Systems: Architectures, Design Methods and Applications. Springer-Verlag GmbH; 2010:269-290. doi:10.1007/978-90-481-3485-4_13
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2010 | Mastersthesis | LibreCat-ID: 10710
Meiche R. FPGA/CPU Multicore-Plattform Für ReconOS/ECos. Paderborn University; 2010.
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2010 | Mastersthesis | LibreCat-ID: 10717
Niekamp M. Transparente Hardwarebeschleunigung Durch Shared Library Interposing. Paderborn University; 2010.
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2010 | Mastersthesis | LibreCat-ID: 10731
Runde B. A Token-Ring Network-On-Chip for Message Passing in ReconOS. Paderborn University; 2010.
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