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387 Publications


2008 | Bachelorsthesis | LibreCat-ID: 10641
Breitlauch, Daniel. Selbstoptimierender Cache-Kontroller. Paderborn University, 2008.
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2008 | Conference Paper | LibreCat-ID: 10653
Glette, Kyrre, et al. “Comparing Evolvable Hardware to Conventional Classifiers for Electromyographic Prosthetic Hand Control.” IEEE Adaptive Hardware and Systems (AHS), IEEE, 2008, pp. 32–39.
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2008 | Conference Paper | LibreCat-ID: 10691
Kaufmann, Paul, and Marco Platzner. “Advanced Techniques for the Creation and Propagation of Modules in Cartesian Genetic Programming.” Genetic and Evolutionary Computation (GECCO), ACM Press, 2008, pp. 1219–26.
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2008 | Bachelorsthesis | LibreCat-ID: 10696
Knieper, Tobias. Implementierung Und Bewertung Des Multikriteriellen Optimierungsverfahrens IBEA Für Den Automatisierten Schaltungsentwurf. Paderborn University, 2008.
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2008 | Bachelorsthesis | LibreCat-ID: 10628
Boschmann, Alexander. Aufbau Und Experimentelle Bewertung Eines Systems Zur Langzeitklassifikation von EMG-Signalen. Paderborn University, 2008.
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2008 | Conference Paper | LibreCat-ID: 10698
Knieper, Tobias, et al. “On Robust Evolution of Digital Hardware.” Biologically Inspired Collaborative Computing (BICC), vol. 268, Springer, 2008, pp. 2313–222.
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2008 | Bachelorsthesis | LibreCat-ID: 10718
Niklas, Jörg. Eine Monitoring- Und Debugging-Infrastruktur Für Hybride HW/SW-Systeme. Paderborn University, 2008.
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2008 | Bachelorsthesis | LibreCat-ID: 10751
Westerheide, Nico. Design and Evaluation of MicroBlaze Multi-Core Architectures. Paderborn University, 2008.
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2008 | Conference Paper | LibreCat-ID: 13630
Lübbers, Enno, and Marco Platzner. “Communication and Synchronization in Multithreaded Reconfigurable Computing Systems.” Proceedings of the 8th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2008.
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2008 | Bachelorsthesis | LibreCat-ID: 10644
Ceylan, Toni, and Coni Yalcin. Verteilte Simulation von Mobilen Robotern Mit EyeSim. Paderborn University, 2008.
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2008 | Conference Paper | LibreCat-ID: 10656
Glette, Kyrre, et al. “A Comparison of Evolvable Hardware Architectures for Classification Tasks.” IEEE Intl. Conf. on Evolvable Systems (ICES), vol. 5216, Springer, 2008, pp. 22–33.
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2008 | Bachelorsthesis | LibreCat-ID: 10721
Östermann, Marco. Raytracing on a Custom Instruction Set CPU. Paderborn University, 2008.
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2008 | Conference Paper | LibreCat-ID: 13629
Giefers, Heiner, and Marco Platzner. “Realizing Reconfigurable Mesh Algorithms on Softcore Arrays.” Proceedings of the International Symposium on Systems, Architectures, Modeling and Simulation (SAMOS), IEEE, 2008.
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2008 | Conference Paper | LibreCat-ID: 13631
Lübbers, Enno, and Marco Platzner. “A Portable Abstraction Layer for Hardware Threads.” Proceedings of the 18th International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2008, doi:10.1109/fpl.2008.4629901.
LibreCat | DOI
 

2008 | Conference Paper | LibreCat-ID: 2364
Schumacher, Tobias, et al. “A Hardware Accelerator for K-Th Nearest Neighbor Thinning.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2008, pp. 245–51.
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2008 | Preprint | LibreCat-ID: 10690
Torresen, Jim, et al. Evolvable Hardware - Tutorial at Architecture of Computing Systems (ARCS). 2008.
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2008 | Mastersthesis | LibreCat-ID: 10669
Happe, Markus. Parallelisierung Und Hardware- / Software - Codesign von Partikelfiltern. Paderborn University, 2008.
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2008 | Conference Paper | LibreCat-ID: 2358
Beisel, Tobias, et al. “A Method for OSEM PET Reconstruction on Parallel Architectures Using STIR.” IEEE Nuclear Science Symposium Conference Record (NSS), IEEE, 2008, pp. 4161–68, doi:10.1109/NSSMIC.2008.4774198.
LibreCat | DOI
 

2008 | Conference Paper | LibreCat-ID: 2365
Platzner, Marco, et al. “The GOmputer: Accelerating GO with FPGAs.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2008, pp. 245–51.
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2008 | Conference Paper | LibreCat-ID: 2372
Schumacher, Tobias, et al. “IMORC: An Infrastructure for Performance Monitoring and Optimization of Reconfigurable Computers.” Many-Core and Reconfigurable Supercomputing Conference (MRSC), 2008.
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