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404 Publications


2009 | Conference Paper | LibreCat-ID: 2262
EvoCaches: Application-specific Adaptation of Cache Mapping
P. Kaufmann, C. Plessl, M. Platzner, in: Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS), IEEE Computer Society, Los Alamitos, CA, USA, 2009, pp. 11–18.
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2009 | Conference Paper | LibreCat-ID: 2263
Woolcano: An Architecture and Tool Flow for Dynamic Instruction Set Extension on Xilinx Virtex-4 FX
M. Grad, C. Plessl, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, USA, 2009, pp. 319–322.
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2009 | Conference Paper | LibreCat-ID: 10639
Towards multi-movement hand prostheses: Combining adaptive classification with high precision sockets
A. Boschmann, P. Kaufmann, M. Platzner, M. Winkler, in: Proc. Technically Assisted Rehabilitation (TAR), 2009.
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2009 | Mastersthesis | LibreCat-ID: 10702
Evolvable Robot Controller
A. Kostin, Evolvable Robot Controller, Paderborn University, 2009.
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2009 | Journal Article | LibreCat-ID: 10703
ReconOS: Multithreaded Programming for Reconfigurable Computers
E. Lübbers, M. Platzner, ACM Transactions on Embedded Computing Systems 9 (2009) 8:1-8:33.
LibreCat | DOI
 

2009 | Mastersthesis | LibreCat-ID: 10746
Compiler for a Custom Instruction Set CPU
M. Tofall, Compiler for a Custom Instruction Set CPU, Paderborn University, 2009.
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2009 | Mastersthesis | LibreCat-ID: 10749
Coarse-grained CGP Model using Xilinx Virtex5 DSP48E Functional Units
A. Warkentin, Coarse-Grained CGP Model Using Xilinx Virtex5 DSP48E Functional Units, Paderborn University, 2009.
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2009 | Bachelorsthesis | LibreCat-ID: 10753
Implementierung von Kryptographie-Hardwarebeschleunigern für das HW/SW-Betriebssystem ReconOS
B. Wildenhain, Implementierung von Kryptographie-Hardwarebeschleunigern Für Das HW/SW-Betriebssystem ReconOS, Paderborn University, 2009.
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2009 | Conference Paper | LibreCat-ID: 10777
Signature Self Checking (SSC): A Low-Cost Reliable Control Logic for Pipelined Microprocessors
H. Ghasemzadeh Mohammadi, S.G. Miremadi, A. Ejlali, in: Dependable Computing (PRDC), 2009 IEEE Pacific Rim International Symposium On, IEEE, 2009, pp. 252–255.
LibreCat | DOI
 

2009 | Conference Paper | LibreCat-ID: 13632
A Multithreaded Framework for Sequential Monte Carlo Methods on CPU/FPGA Platforms
M. Happe, E. Lübbers, M. Platzner, in: Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC), Springer, 2009.
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2009 | Conference Paper | LibreCat-ID: 13634
Towards Models for Many-Cores: The Case for the Reconfigurable Mesh
H. Giefers, M. Platzner, in: Proceedings of the Workshop on Many-Cores, International Conference on Architecture of Computing Systems (ARCS), 2009.
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2009 | Conference Paper | LibreCat-ID: 13635
ARMLang: A Language and Compiler for Programming Reconfigurable Mesh Many-Cores
H. Giefers, M. Platzner, in: Reconfigurable Architectures Workshop (RAW), Proceedings of the International Parallel and Distributed Processing Symposium, IEEE, 2009.
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2009 | Conference Paper | LibreCat-ID: 13636
Cooperative Multithreading in Dynamically Reconfigurable Systems
E. Lübbers, M. Platzner, in: Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) , IEEE, 2009.
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2009 | Conference Paper | LibreCat-ID: 13637
Program-driven Fine-grained Power Management for the Reconfigurable Mesh
H. Giefers, M. Platzner, in: Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) , IEEE, 2009.
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2009 | Conference Paper | LibreCat-ID: 13638
An adaptive Sequential Monte Carlo framework with runtime HW/SW repartitioning
M. Happe, E. Lübbers, M. Platzner, in: Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT), IEEE, 2009.
LibreCat | DOI
 

2009 | Conference Paper | LibreCat-ID: 13639
Proof-carrying Hardware: Towards Runtime Verification of Reconfigurable Modules
S. Drzevitzky, U. Kastens, M. Platzner, in: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2009.
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2008 | Conference Paper | LibreCat-ID: 2358
A method for OSEM PET reconstruction on parallel architectures using STIR
T. Beisel, S. Lietsch, K. Thielemans, in: IEEE Nuclear Science Symposium Conference Record (NSS), IEEE, 2008, pp. 4161–4168.
LibreCat | DOI
 

2008 | Conference Paper | LibreCat-ID: 2364
A Hardware Accelerator for k-th Nearest Neighbor Thinning
T. Schumacher, R. Meiche, P. Kaufmann, E. Lübbers, C. Plessl, M. Platzner, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2008, pp. 245–251.
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2008 | Conference Paper | LibreCat-ID: 2365
The GOmputer: Accelerating GO with FPGAs
M. Platzner, S. Döhre, M. Happe, T. Kenter, U. Lorenz, T. Schumacher, A. Send, A. Warkentin, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2008, pp. 245–251.
LibreCat
 

2008 | Conference Paper | LibreCat-ID: 2372
IMORC: An infrastructure for performance monitoring and optimization of reconfigurable computers
T. Schumacher, C. Plessl, M. Platzner, in: Many-Core and Reconfigurable Supercomputing Conference (MRSC), 2008.
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