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427 Publications
2010 | Mastersthesis | LibreCat-ID: 10697
Knieper T. Hybridization of Global Multi-Objective and Local Search Techniques. Paderborn University; 2010.
LibreCat
2010 | Conference Paper | LibreCat-ID: 10699
Knieper T, Kaufmann P, Glette K, Platzner M, Torresen J. Coping with Resource Fluctuations: The Run-time Reconfigurable Functional Unit Row Classifier Architecture. In: IEEE Intl. Conf. on Evolvable Systems (ICES). Vol 6274. LNCS. Springer; 2010:250-261.
LibreCat
2010 | Book Chapter | LibreCat-ID: 10704
Lübbers E, Platzner M. ReconOS: An Operating System for Dynamically Reconfigurable Hardware. In: Platzner M, Teich J, Wehn N, eds. Dynamically Reconfigurable Systems: Architectures, Design Methods and Applications. Springer-Verlag GmbH; 2010:269-290. doi:10.1007/978-90-481-3485-4_13
LibreCat
| DOI
2010 | Mastersthesis | LibreCat-ID: 10710
Meiche R. FPGA/CPU Multicore-Plattform Für ReconOS/ECos. Paderborn University; 2010.
LibreCat
2010 | Mastersthesis | LibreCat-ID: 10717
Niekamp M. Transparente Hardwarebeschleunigung Durch Shared Library Interposing. Paderborn University; 2010.
LibreCat
2010 | Mastersthesis | LibreCat-ID: 10731
Runde B. A Token-Ring Network-On-Chip for Message Passing in ReconOS. Paderborn University; 2010.
LibreCat
2010 | Mastersthesis | LibreCat-ID: 10752
Wiersema T. Scheduling Support for Heterogeneous Hardware Accelerators under Linux. Paderborn University; 2010.
LibreCat
2010 | Book (Editor) | LibreCat-ID: 10763
Platzner M, Teich J, Wehn N, eds. Dynamically Reconfigurable Systems: Architectures, Design Methods and Applications. Springer-Verlag GmbH; 2010. doi:10.1007/978-90-481-3485-4
LibreCat
| DOI
2010 | Conference Paper | LibreCat-ID: 10776
Khatir M, Ghasemzadeh Mohammadi H, Ejlali A. Sub-threshold charge recovery circuits. In: Computer Design (ICCD), 2010 IEEE International Conference On. IEEE; 2010:138-144. doi:10.1109/ICCD.2010.5647815
LibreCat
| DOI
2010 | Conference Paper | LibreCat-ID: 13640
Giefers H, Platzner M. A Triple Hybrid Interconnect for Many-Cores: Reconfigurable Mesh, NoC and Barrier. In: Proceedings of the 20th International Conference on Field Programmable Logic and Applications (FPL). IEEE; 2010.
LibreCat
2010 | Conference Paper | LibreCat-ID: 13641
Schäfer W, Birattari M, Blömer J, et al. Engineering Self-Coordinating Software Intensive Systems. In: Proceedings of the Foundations of Software Engineering (FSE) and NITR & D/SPD Working Conference on the Future of Software Engineering Research (FoSER). ; 2010:321-324.
LibreCat
2010 | Conference Paper | LibreCat-ID: 13642
Giefers H, Platzner M. A Self-Reconfigurable Lightweight Interconnect for Scalable Processor Fabrics. In: Proceedings of the 10th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2010.
LibreCat
2010 | Conference Paper | LibreCat-ID: 2223
Lübbers E, Platzner M, Plessl C, Keller A, Plattner B. Towards Adaptive Networking for Embedded Devices based on Reconfigurable Hardware. In: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2010:225-231.
LibreCat
2010 | Conference Paper | LibreCat-ID: 2216
Grad M, Plessl C. Pruning the Design Space for Just-In-Time Processor Customization. In: Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig). IEEE Computer Society; 2010:67-72. doi:10.1109/ReConFig.2010.19
LibreCat
| DOI
2010 | Conference Paper | LibreCat-ID: 2224
Grad M, Plessl C. An Open Source Circuit Library with Benchmarking Facilities. In: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2010:144-150.
LibreCat
2010 | Conference Paper | LibreCat-ID: 2220
Andrews D, Plessl C. Configurable Processor Architectures: History and Trends. In: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2010:165.
LibreCat
2010 | Conference (Editor) | LibreCat-ID: 2222
Plaks TP, Andrews D, DeMara R, et al., eds. Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2010.
LibreCat
2010 | Conference Paper | LibreCat-ID: 2226
Beisel T, Niekamp M, Plessl C. Using Shared Library Interposing for Transparent Acceleration in Systems with Heterogeneous Hardware Accelerators. In: Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP). IEEE Computer Society; 2010:65-72. doi:10.1109/ASAP.2010.5540798
LibreCat
| DOI
2010 | Conference Paper | LibreCat-ID: 2206
Keller A, Plattner B, Lübbers E, Platzner M, Plessl C. Reconfigurable Nodes for Future Networks. In: Proc. IEEE Globecom Workshop on Network of the Future (FutureNet). IEEE; 2010:372-376. doi:10.1109/GLOCOMW.2010.5700341
LibreCat
| DOI
2010 | Conference Paper | LibreCat-ID: 2228
Kenter T, Platzner M, Plessl C, Kauschke M. Performance Estimation for the Exploration of CPU-Accelerator Architectures. In: Hammami O, Larrabee S, eds. Proc. Workshop on Architectural Research Prototyping (WARP), International Symposium on Computer Architecture (ISCA). ; 2010.
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