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433 Publications
2009 | Conference Paper | LibreCat-ID: 2350
Schumacher T, Plessl C, Platzner M. IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing. In: Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM). IEEE Computer Society; 2009:275-278. doi:10.1109/FCCM.2009.25
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| DOI
2009 | Conference Paper | LibreCat-ID: 2262
Kaufmann P, Plessl C, Platzner M. EvoCaches: Application-specific Adaptation of Cache Mapping. In: Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS). IEEE Computer Society; 2009:11-18.
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2009 | Conference Paper | LibreCat-ID: 2238
Schumacher T, Süß T, Plessl C, Platzner M. Communication Performance Characterization for Reconfigurable Accelerator Design on the XD1000. In: Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig). IEEE Computer Society; 2009:119-124. doi:10.1109/ReConFig.2009.32
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| DOI
2009 | Conference Paper | LibreCat-ID: 2261
Schumacher T, Plessl C, Platzner M. An Accelerator for k-th Nearest Neighbor Thinning Based on the IMORC Infrastructure. In: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL). IEEE; 2009:338-344.
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2009 | Conference Paper | LibreCat-ID: 2263
Grad M, Plessl C. Woolcano: An Architecture and Tool Flow for Dynamic Instruction Set Extension on Xilinx Virtex-4 FX. In: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2009:319-322.
LibreCat
2008 | Conference Paper | LibreCat-ID: 2358
Beisel T, Lietsch S, Thielemans K. A method for OSEM PET reconstruction on parallel architectures using STIR. In: IEEE Nuclear Science Symposium Conference Record (NSS). IEEE; 2008:4161-4168. doi:10.1109/NSSMIC.2008.4774198
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| DOI
2008 | Conference Paper | LibreCat-ID: 2365
Platzner M, Döhre S, Happe M, et al. The GOmputer: Accelerating GO with FPGAs. In: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2008:245-251.
LibreCat
2008 | Bachelorsthesis | LibreCat-ID: 10628
Boschmann A. Aufbau Und Experimentelle Bewertung Eines Systems Zur Langzeitklassifikation von EMG-Signalen. Paderborn University; 2008.
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2008 | Bachelorsthesis | LibreCat-ID: 10641
Breitlauch D. Selbstoptimierender Cache-Kontroller. Paderborn University; 2008.
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2008 | Bachelorsthesis | LibreCat-ID: 10644
Ceylan T, Yalcin C. Verteilte Simulation von Mobilen Robotern Mit EyeSim. Paderborn University; 2008.
LibreCat
2008 | Conference Paper | LibreCat-ID: 10653
Glette K, Gruber T, Kaufmann P, Torresen J, Sick B, Platzner M. Comparing Evolvable Hardware to Conventional Classifiers for Electromyographic Prosthetic Hand Control. In: IEEE Adaptive Hardware and Systems (AHS). IEEE; 2008:32-39.
LibreCat
2008 | Conference Paper | LibreCat-ID: 10656
Glette K, Torresen J, Kaufmann P, Platzner M. A Comparison of Evolvable Hardware Architectures for Classification Tasks. In: IEEE Intl. Conf. on Evolvable Systems (ICES). Vol 5216. LNCS. Springer; 2008:22-33.
LibreCat
2008 | Mastersthesis | LibreCat-ID: 10669
Happe M. Parallelisierung Und Hardware- / Software - Codesign von Partikelfiltern. Paderborn University; 2008.
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2008 | Preprint | LibreCat-ID: 10690
Torresen J, Glette K, Platzner M, Kaufmann P. Evolvable Hardware - Tutorial at Architecture of Computing Systems (ARCS). 2008.
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2008 | Conference Paper | LibreCat-ID: 10691
Kaufmann P, Platzner M. Advanced Techniques for the Creation and Propagation of Modules in Cartesian Genetic Programming. In: Genetic and Evolutionary Computation (GECCO). ACM Press; 2008:1219-1226.
LibreCat
2008 | Bachelorsthesis | LibreCat-ID: 10696
Knieper T. Implementierung Und Bewertung Des Multikriteriellen Optimierungsverfahrens IBEA Für Den Automatisierten Schaltungsentwurf. Paderborn University; 2008.
LibreCat
2008 | Conference Paper | LibreCat-ID: 10698
Knieper T, Defo B, Kaufmann P, Platzner M. On Robust Evolution of Digital Hardware. In: Biologically Inspired Collaborative Computing (BICC). Vol 268. IFIP International Federation for Information Processing. Springer; 2008:2313-222.
LibreCat
2008 | Bachelorsthesis | LibreCat-ID: 10718
Niklas J. Eine Monitoring- Und Debugging-Infrastruktur Für Hybride HW/SW-Systeme. Paderborn University; 2008.
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2008 | Bachelorsthesis | LibreCat-ID: 10721
Östermann M. Raytracing on a Custom Instruction Set CPU. Paderborn University; 2008.
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2008 | Bachelorsthesis | LibreCat-ID: 10751
Westerheide N. Design and Evaluation of MicroBlaze Multi-Core Architectures. Paderborn University; 2008.
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2008 | Conference Paper | LibreCat-ID: 10778
Ghasemzadeh Mohammadi H, Tabkhi H, Miremadi SG, Ejlali A. A cost-effective error detection and roll-back recovery technique for embedded microprocessor control logic. In: 2008 International Conference on Microelectronics. IEEE; 2008:444-447. doi:10.1109/ICM.2008.5393497
LibreCat
| DOI
2008 | Conference Paper | LibreCat-ID: 13629
Giefers H, Platzner M. Realizing Reconfigurable Mesh Algorithms on Softcore Arrays. In: Proceedings of the International Symposium on Systems, Architectures, Modeling and Simulation (SAMOS). IEEE; 2008.
LibreCat
2008 | Conference Paper | LibreCat-ID: 13630
Lübbers E, Platzner M. Communication and Synchronization in Multithreaded Reconfigurable Computing Systems. In: Proceedings of the 8th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2008.
LibreCat
2008 | Conference Paper | LibreCat-ID: 13631
Lübbers E, Platzner M. A portable abstraction layer for hardware threads. In: Proceedings of the 18th International Conference on Field Programmable Logic and Applications (FPL). IEEE; 2008. doi:10.1109/fpl.2008.4629901
LibreCat
| DOI
2008 | Conference Paper | LibreCat-ID: 2364
Schumacher T, Meiche R, Kaufmann P, Lübbers E, Plessl C, Platzner M. A Hardware Accelerator for k-th Nearest Neighbor Thinning. In: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2008:245-251.
LibreCat
2008 | Conference Paper | LibreCat-ID: 2372
Schumacher T, Plessl C, Platzner M. IMORC: An infrastructure for performance monitoring and optimization of reconfigurable computers. In: Many-Core and Reconfigurable Supercomputing Conference (MRSC). ; 2008.
LibreCat
2007 | Conference Paper | LibreCat-ID: 6508
Kaufmann P, Platzner M. MOVES: A Modular Framework for Hardware Evolution. In: Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007). IEEE; 2007:447-454. doi:10.1109/ahs.2007.73
LibreCat
| DOI
2007 | Mastersthesis | LibreCat-ID: 10623
Beisel T. Entwurf Und Evaluation Eines Parallelen Verfahrens Zur Bildrekonstruktion in Der Positronen-Emissions-Tomographie Auf Multi-Core-Architekturen. Paderborn University; 2007.
LibreCat
2007 | Journal Article | LibreCat-ID: 10625
Bergmann N, Platzner M, Teich J. Dynamically Reconfigurable Architectures (editorial). {EURASIP} Journal on Embedded Systems. 2007;2007:1-2. doi:10.1155/2007/28405
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| DOI
2007 | Bachelorsthesis | LibreCat-ID: 10643
Ceylan T, Yalcin C. Distributed Simulation of Mobile Robots Using EyeSim. Paderborn University; 2007.
LibreCat
2007 | Journal Article | LibreCat-ID: 10646
Danne K, Mühlenbernd R, Platzner M. Server-based execution of periodic tasks on dynamically reconfigurable hardware. IET Computers Digital Techniques. 2007;1(4):295-302. doi:10.1049/iet-cdt:20060186
LibreCat
| DOI
2007 | Mastersthesis | LibreCat-ID: 10647
Defo B. A Comparison of Multi-Objective Evolutionary Algorithms for Automated Circuit Design and Optimization. Paderborn University; 2007.
LibreCat
2007 | Mastersthesis | LibreCat-ID: 10648
Döhre S. Entwurf Und Implementierung Einer RocketIO-Basierten Kommunikationsschnittstelle Für Multi-FPGA Systeme. Paderborn University; 2007.
LibreCat
2007 | Conference Paper | LibreCat-ID: 10689
Kaufmann P, Platzner M. Toward Self-adaptive Embedded Systems: Multi-objective Hardware Evolution. In: Architecture of Computing Systems (ARCS). Vol 4415. LNCS. Springer; 2007:199-208.
LibreCat
2007 | Bachelorsthesis | LibreCat-ID: 10709
Meiche R. VHDL-Implementierung Eines Clustering-Verfahrens Für Multikriterielle Optimierungsalgorithmen. Paderborn University; 2007.
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2007 | Mastersthesis | LibreCat-ID: 10728
Reisch W. Bildverarbeitungs-Architekturen Und -Bibliotheken Für Das Rekonfigurierbare Betriebssystem ReconOS. Paderborn University; 2007.
LibreCat
2007 | Mastersthesis | LibreCat-ID: 10729
Rethmeier E. Konzeption Und Implementierung Einer Microsoft Windows CE 5.0 Plattform Für Ein ARM-Basiertes Eingebettetes Rechnersystem. Paderborn University; 2007.
LibreCat
2007 | Conference Paper | LibreCat-ID: 10735
Schumacher T, Lübbers E, Kaufmann P, Platzner M. Accelerating the Cube Cut Problem with an FPGA-Augmented Compute Cluster. In: Proceedings of the ParaFPGA Symposium, International Conference on Parallel Computing: Architectures, Algorithms and Applications (PARCO). Vol 15. Advances in Parallel Computing. IOS Press; 2007:749-756.
LibreCat
2007 | Conference Paper | LibreCat-ID: 13627
Giefers H, Platzner M. A Many-Core Implementation Based on the Reconfigurable Mesh Model. In: Proceedings of the 17th International Conference on Field Programmable Logic and Applications (FPL). IEEE; 2007. doi:10.1109/fpl.2007.4380623
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| DOI
2007 | Conference Paper | LibreCat-ID: 13628
Lübbers E, Platzner M. ReconOS: An RTOS Supporting Hard-and Software Threads. In: Proceedings of the 17th International Conference on Field Programmable Logic and Applications (FPL). IEEE; 2007. doi:10.1109/fpl.2007.4380686
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| DOI
2006 | Conference Paper | LibreCat-ID: 2401
Plessl C, Platzner M, Thiele L. Optimal Temporal Partitioning based on Slowdown and Retiming. In: Proc. Int. Conf. on Field Programmable Technology (ICFPT). IEEE Computer Society; 2006:345-348. doi:10.1109/FPT.2006.270344
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| DOI
2006 | Conference Paper | LibreCat-ID: 10688
Kaufmann P, Platzner M. Multi-objective Intrinsic Hardware Evolution. In: Intl. Conf. Military Applications of Programmable Logic Devices (MAPLD). ; 2006.
LibreCat
2006 | Bachelorsthesis | LibreCat-ID: 10716
Mühlenbernd R. FPGA-Implementierung Eines Server-Basierten Schedulers Für Periodische Hardwaretasks. Paderborn University; 2006.
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2006 | Conference Paper | LibreCat-ID: 13624
Danne K, Mühlenbernd R, Platzner M. Executing Hardware Tasks on Dynamically Reconfigurable Devices under Real-time Conditions. In: Proceedings of the 16th International Conference on Field Programmable Logic and Applications (FPL). IEEE; 2006.
LibreCat
2006 | Conference Paper | LibreCat-ID: 13625
Danne K, Platzner M. An EDF Schedulability Test for Periodic Tasks on Reconfigurable Hardware Devices. In: In ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES). ; 2006.
LibreCat
2006 | Conference Paper | LibreCat-ID: 13626
Danne K, Platzner M. Partitioned Scheduling of Periodic Real-time Tasks onto Reconfigurable Hardware. In: Proceedings of the 13th Reconfigurable Architectures Workshop (RAW). IEEE CS Press; 2006.
LibreCat
2005 | Conference Paper | LibreCat-ID: 2411
Plessl C, Platzner M. Zippy – A coarse-grained reconfigurable array with support for hardware virtualization. In: Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP). IEEE Computer Society; 2005:213-218. doi:10.1109/ASAP.2005.69
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| DOI
2005 | Journal Article | LibreCat-ID: 2412
Enzler R, Plessl C, Platzner M. System-level performance evaluation of reconfigurable processors. Microprocessors and Microsystems. 2005;29(2-3):63-73. doi:10.1016/j.micpro.2004.06.004
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| DOI
2005 | Conference Paper | LibreCat-ID: 13621
Danne K, Platzner M. Periodic real-time scheduling for FPGA computers. In: Proceedings of the Third International Workshop on Intelligent Solutions in Embedded Systems (WISES). ; 2005. doi:10.1109/wises.2005.1438720
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| DOI
2005 | Conference Paper | LibreCat-ID: 13622
Danne K, Platzner M. Memory-demanding Periodic Real-time Applications on FPGA Computers. In: Work-in-Progress Proceedings of the 17th Euromicro Conference on Real-Time Systems (ECRTS). ; 2005.
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