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451 Publications
2011 | Bachelorsthesis | LibreCat-ID: 10678
Ikonomakis N. PinSim: Schnelle Simulation Mit Pintools. Paderborn University; 2011.
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2011 | Bachelorsthesis | LibreCat-ID: 10680
Kassner H. MPI-CUDA Codegenerierung Für Nanophoton Simulationen Auf Clustern. Paderborn University; 2011.
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2011 | Book Chapter | LibreCat-ID: 10687
Kaufmann P, Platzner M. Multi-objective Intrinsic Evolution of Embedded Systems. In: Müller-Schloer C, Schmeck H, Ungerer T, eds. Organic Computing---A Paradigm Shift for Complex Systems. Vol 1. Autonomic Systems. Springer Basel; 2011:193-206.
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2011 | Mastersthesis | LibreCat-ID: 10736
Schwabe A. Analysis of Algorithmic Approaches for Temporal Partitioning. Paderborn University; 2011.
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2011 | Book Chapter | LibreCat-ID: 10737
Sekanina L, Walker JA, Kaufmann P, Plessl C, Platzner M. Evolution of Electronic Circuits. In: Cartesian Genetic Programming. Natural Computing Series. Springer Berlin Heidelberg; 2011:125-179.
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2011 | Book Chapter | LibreCat-ID: 10748
Walker JA, Miller JF, Kaufmann P, Platzner M. Problem Decomposition in Cartesian Genetic Programming. In: Cartesian Genetic Programming. Natural Computing Series. Springer Berlin Heidelberg; 2011:35-99.
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2011 | Mastersthesis | LibreCat-ID: 10750
Welp D. User Space Scheduling for Heterogeneous Systems. Paderborn University; 2011.
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2011 | Conference Paper | LibreCat-ID: 13643
Agne A, Platzner M, Lübbers E. Memory Virtualization for Multithreaded Reconfigurable Hardware. In: Proceedings of the International Conference on Field Programmable Logic and Applications (FPL). IEEE; 2011:185-188. doi:10.1109/fpl.2011.42
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| DOI
2011 | Conference Paper | LibreCat-ID: 13644
Henkel J, Hedrich L, Herkersdorf A, et al. Design and architectures for dependable embedded systems. In: Proceedings of the Seventh IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis - CODES+ISSS ’11. ; 2011. doi:10.1145/2039370.2039384
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| DOI
2011 | Conference Paper | LibreCat-ID: 2194
Meyer B, Plessl C, Förstner J. Transformation of scientific algorithms to parallel computing code: subdomain support in a MPI-multi-GPU backend. In: Symp. on Application Accelerators in High Performance Computing (SAAHPC). IEEE Computer Society; 2011:60-63. doi:10.1109/SAAHPC.2011.12
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| DOI
2011 | Conference Paper | LibreCat-ID: 2193
Beisel T, Wiersema T, Plessl C, Brinkmann A. Cooperative multitasking for heterogeneous accelerators in the Linux Completely Fair Scheduler. In: Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP). IEEE Computer Society; 2011:223-226. doi:10.1109/ASAP.2011.6043273
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| DOI
2011 | Conference Paper | LibreCat-ID: 656
Happe M, Agne A, Plessl C. Measuring and Predicting Temperature Distributions on FPGAs at Run-Time. In: Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig). IEEE; 2011:55-60. doi:10.1109/ReConFig.2011.59
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| Files available
| DOI
2011 | Conference Paper | LibreCat-ID: 2200
Kenter T, Platzner M, Plessl C, Kauschke M. Performance Estimation Framework for Automated Exploration of CPU-Accelerator Architectures. In: Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA). ACM; 2011:177-180. doi:10.1145/1950413.1950448
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| DOI
2011 | Journal Article | LibreCat-ID: 2201
Schumacher T, Süß T, Plessl C, Platzner M. FPGA Acceleration of Communication-bound Streaming Applications: Architecture Modeling and a 3D Image Compositing Case Study. Int Journal of Recon- figurable Computing (IJRC). Published online 2011. doi:10.1155/2011/760954
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| DOI
2011 | Conference Paper | LibreCat-ID: 2198
Grad M, Plessl C. Just-in-time Instruction Set Extension – Feasibility and Limitations for an FPGA-based Reconfigurable ASIP Architecture. In: Proc. Reconfigurable Architectures Workshop (RAW). IEEE Computer Society; 2011:278-285. doi:10.1109/IPDPS.2011.153
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| DOI
2010 | Journal Article | LibreCat-ID: 10605
Drzevitzky S, Kastens U, Platzner M. Proof-Carrying Hardware: Concept and Prototype Tool Flow for Online Verification. International Journal of Reconfigurable Computing. 2010;2010. doi:10.1155/2010/180242
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| DOI
2010 | Mastersthesis | LibreCat-ID: 10614
Agne A. Virtuelle Speicherverwaltung Für Hardware Threads in Rekonfigurierbaren Systemen. Paderborn University; 2010.
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2010 | Mastersthesis | LibreCat-ID: 10629
Boschmann A. EMG-Basierte Ganganalyse. Paderborn University; 2010.
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2010 | Mastersthesis | LibreCat-ID: 10642
Breitlauch D. Evolvable Cache Controller. Paderborn University; 2010.
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2010 | Bachelorsthesis | LibreCat-ID: 10649
Dridger D. Soft Microprocessors with Tightly Coupled Application-Specific Coprocessors. Paderborn University; 2010.
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