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449 Publications


2019 | Journal Article | LibreCat-ID: 12967
Hansmeier, Tim, et al. “An Accelerator for Resolution Proof Checking Based on FPGA and Hybrid Memory Cube Technology.” Journal of Signal Processing Systems, vol. 91, no. 11, 2019, pp. 1259–72, doi:10.1007/s11265-018-1435-y.
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2019 | Conference Paper | LibreCat-ID: 15422
Ho, Nam, et al. “Optimization of Application-Specific L1 Cache Translation Functions of the LEON3 Processor.” World Congress on Nature and Biologically Inspired Computing (NaBIC), Springer, 2019.
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2019 | Mastersthesis | LibreCat-ID: 15883
Kumar Jeyakumar, Shankar. Incremental Learning with Support Vector Machine on Embedded Platforms. 2019.
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2019 | Mastersthesis | LibreCat-ID: 15920
Keerthipati, Monica. A Bitstream-Level Proof-Carrying Hardware Technique for Information Flow Tracking. Universität Paderborn, 2019.
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2019 | Mastersthesis | LibreCat-ID: 14831
Sabu, Nithin S. FPGA Acceleration of String Search Techniques in Huge Data Sets. Paderborn University, 2019.
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2019 | Mastersthesis | LibreCat-ID: 15946
Mehta, Jinay. Multithreaded Software/Hardware Programming with ReconOS/FreeRTOS on a Recon􏰃gurable System-on-Chip. 2019.
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2019 | Mastersthesis | LibreCat-ID: 14546
Hansmeier, Tim. Autonomous Operation of High-Performance Compute Nodes through Self-Awareness and Learning Classifiers. Universität Paderborn, 2019.
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2019 | Conference Paper | LibreCat-ID: 31067
Guettatfi, Zakarya, et al. “An Approach for Mapping Periodic Real-Time Tasks to Reconfigurable Hardware.” 2019 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), IEEE, 2019, doi:10.1109/ipdpsw.2019.00027.
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2019 | Conference Paper | LibreCat-ID: 9913 | OA
Ahmed, Qazi Arbab, et al. “Proof-Carrying Hardware Versus the Stealthy Malicious LUT Hardware Trojan.” Applied Reconfigurable Computing, edited by Christian Hochberger et al., vol. 11444, Springer International Publishing, 2019, pp. 127–36, doi:10.1007/978-3-030-17227-5_10.
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2019 | Mastersthesis | LibreCat-ID: 15874 | OA
Lienen, Christian. Implementing a Real-Time System on a Platform FPGA Operated with ReconOS. Universität Paderborn.
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2019 | Journal Article | LibreCat-ID: 12871 | OA
Platzner, Marco, and Christian Plessl. “FPGAs im Rechenzentrum.” Informatik Spektrum, 2019, doi:10.1007/s00287-019-01187-w.
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2019 | Mastersthesis | LibreCat-ID: 52478
Mehta, Jinay D. Multithreaded Software/Hardware Programming with ReconOS/FreeRTOS on a Reconfigurable System-on-Chip. 2019.
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2018 | Conference Paper | LibreCat-ID: 3362
Lösch, Achim, et al. “Ampehre: An Open Source Measurement Framework for Heterogeneous Compute Nodes.” Proceedings of the International Conference on Architecture of Computing Systems (ARCS), vol. 10793, Springer International Publishing, 2018, pp. 73–84, doi:10.1007/978-3-319-77610-1_6.
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2018 | Bachelorsthesis | LibreCat-ID: 3365
Schnuer, Jan-Philip. Static Scheduling Algorithms for Heterogeneous Compute Nodes. Universität Paderborn, 2018.
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2018 | Bachelorsthesis | LibreCat-ID: 3366
Croce, Marcel. Evaluation of OpenCL-Based Compilation for FPGAs. Universität Paderborn, 2018.
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2018 | Conference Paper | LibreCat-ID: 3373
Hansmeier, Tim, et al. “An FPGA/HMC-Based Accelerator for Resolution Proof Checking.” ARC 2018: Applied Reconfigurable Computing. Architectures, Tools, and Applications, vol. 10824, Springer International Publishing, 2018, pp. 153–65, doi:10.1007/978-3-319-78890-6_13.
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2018 | Preprint | LibreCat-ID: 3586
Witschen, Linus Matthias, et al. “CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation.” Third Workshop on Approximate Computing (AxC 2018).
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2018 | Dissertation | LibreCat-ID: 3720
Ho, Nam. FPGA-Based Reconfigurable Cache Mapping Schemes: Design and Optimization. Universität Paderborn, 2018, doi:10.17619/UNIPB/1-376.
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2018 | Preprint | LibreCat-ID: 1165
Witschen, Linus Matthias, et al. “Making the Case for Proof-Carrying Approximate Circuits.” 4th Workshop On Approximate Computing (WAPCO 2018), 2018.
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2018 | Conference Paper | LibreCat-ID: 5547
Lösch, Achim, and Marco Platzner. “A Highly Accurate Energy Model for Task Execution on Heterogeneous Compute Nodes.” 2018 IEEE 29th International Conference on Application-Specific Systems, Architectures and Processors (ASAP), IEEE, 2018, doi:10.1109/asap.2018.8445098.
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