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7 Publications

2017 | Conference Paper | LibreCat-ID: 10676
Evolvable caches: Optimization of reconfigurable cache mappings for a LEON3/Linux-based multi-core processor
N. Ho, P. Kaufmann, M. Platzner, in: 2017 International Conference on Field Programmable Technology (ICFPT), 2017, pp. 215–218.
LibreCat | DOI

2017 | Conference Paper | LibreCat-ID: 48856
An Extended Mutation-Based Priority-Rule Integration Concept for Multi-Objective Machine Scheduling
J. Bossek, C. Grimme, in: 2017 IEEE Symposium Series on Computational Intelligence (SSCI), 2017, pp. 1–8.
LibreCat | DOI

2015 | Conference Paper | LibreCat-ID: 10673
Microarchitectural optimization by means of reconfigurable and evolvable cache mappings
N. Ho, A.F. Ahmed, P. Kaufmann, M. Platzner, in: Proc. NASA/ESA Conf. Adaptive Hardware and Systems (AHS), 2015, pp. 1–7.
LibreCat | DOI

2014 | Conference Paper | LibreCat-ID: 10677
Towards self-adaptive caches: A run-time reconfigurable multi-core infrastructure
N. Ho, P. Kaufmann, M. Platzner, in: 2014 {IEEE} Intl. Conf. on Evolvable Systems (ICES), 2014, pp. 31–37.
LibreCat | DOI

2013 | Conference Paper | LibreCat-ID: 36920
An Energy-Efficient Heuristic for Hard Real-Time System on Multi-Core Processors
D. He, W. Müller, in: H. Weghorn (Ed.), Proceedings of the International Conference on Applied Computing (AC), Fort Worth, Texas, USA, 2013.

2010 | Conference Paper | LibreCat-ID: 37009
Assertion-Based Verification of RTOS Properties
M.F.S. Oliveira, H. Zabel, W. Müller, in: Proceedings of DATE’10, IEEE, Dresden, 2010.
LibreCat | DOI

1996 | Conference Paper | LibreCat-ID: 39526
Visual Modeling and 3D-Representation with a Complete Visual Programming Language --- A Case Study in Manufacturing
C. Geiger, R. Hunstock, G. Lehrenfeld, W. Müller, J. Quintanilla, C. Tahedl, A. Weber, in: Proceedings of the 1996 IEEE Symposium on Visual Languages, Boulder, CO, USA, 1996.
LibreCat | DOI

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