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5 Publications
2019 | Mastersthesis | LibreCat-ID: 15920
Keerthipati M. A Bitstream-Level Proof-Carrying Hardware Technique for Information Flow Tracking. Universität Paderborn; 2019.
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2019 | Mastersthesis | LibreCat-ID: 14831
Sabu NS. FPGA Acceleration of String Search Techniques in Huge Data Sets. Paderborn University; 2019.
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2018 | Bachelorsthesis | LibreCat-ID: 1097
Jentzsch FP. Enforcing IP Core Connection Properties with Verifiable Security Monitors. Universität Paderborn; 2018.
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2017 | Mastersthesis | LibreCat-ID: 1157
Witschen LM. A Framework for the Synthesis of Approximate Circuits. Universität Paderborn; 2017.
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2015 | Bachelorsthesis | LibreCat-ID: 10714
Meißner R. Konzept Und Implementation Einer Benutzeroberfläche Zur Generierung Virtueller FPGAs. Universität Paderborn; 2015.
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