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5 Publications
2019 | Mastersthesis | LibreCat-ID: 15920
Keerthipati, M. (2019). A Bitstream-Level Proof-Carrying Hardware Technique for Information Flow Tracking. Universität Paderborn.
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2019 | Mastersthesis | LibreCat-ID: 14831
Sabu, N. S. (2019). FPGA Acceleration of String Search Techniques in Huge Data Sets. Paderborn University.
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2018 | Bachelorsthesis | LibreCat-ID: 1097
Jentzsch, F. P. (2018). Enforcing IP Core Connection Properties with Verifiable Security Monitors. Universität Paderborn.
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2017 | Mastersthesis | LibreCat-ID: 1157
Witschen, L. M. (2017). A Framework for the Synthesis of Approximate Circuits. Universität Paderborn.
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2015 | Bachelorsthesis | LibreCat-ID: 10714
Meißner, R. (2015). Konzept und Implementation einer Benutzeroberfläche zur Generierung virtueller FPGAs. Universität Paderborn.
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