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45 Publications
2025 | Dissertation | LibreCat-ID: 59232 | 
Clausing L. ReconOS64 - Hardware-Software Multithreading for Heterogeneous Platform FPGAs.; 2025. doi:10.17619/UNIPB/1-2216
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2024 | Mastersthesis | LibreCat-ID: 54245
Henke L-S. Exploring Custom FPGA Accelerators for DNN-Based RF Fingerprinting.; 2024.
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2024 | Bachelorsthesis | LibreCat-ID: 59621
Erhart T. Efficient Automatic Speech Recognition on FPGAs for Datacenters.; 2024.
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2024 | Bachelorsthesis | LibreCat-ID: 58132
Hartinger M. Controlling I/O Devices from Hardware-Mapped ReconROS Nodes. Paderborn University; 2024.
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2023 | Dissertation | LibreCat-ID: 47837
Hansmeier T. XCS for Self-Awareness in Autonomous Computing Systems.; 2023.
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2023 | Mastersthesis | LibreCat-ID: 54127
Anantha Rao DB. Efficient Neural Network Inference for Velocity Estimation in Athletic Relay Races on a Microcontroller. Paderborn University; 2023.
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2023 | Bachelorsthesis | LibreCat-ID: 42839
Mehlich F. An Evaluation of XCS on the OpenAI Gym. Paderborn University; 2023.
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2023 | Bachelorsthesis | LibreCat-ID: 45762
Simon-Mertens F. Effizienzanalyse leichtgewichtiger Neuronaler Netze für FPGA-basierte Modulationsklassifikation. Paderborn University; 2023.
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2023 | Bachelorsthesis | LibreCat-ID: 54243
Oviasogie MO. Demonstrator for Dataflow-Based DNN Acceleration for Vision Applications on Platform FPGAs. Paderborn University; 2023.
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2023 | Bachelorsthesis | LibreCat-ID: 54241
Reuter LD. Development of a Power Analysis Framework for Embedded FPGA Accelerators. Paderborn University; 2023.
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2023 | Bachelorsthesis | LibreCat-ID: 54246
Hamm R. Verarbeitung von Sensordaten auf eingebetteten heterogenen FPGA-Systemen. Paderborn University; 2023.
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2023 | Mastersthesis | LibreCat-ID: 54244
AlAidroos S. Design and Implementation of a RadioML Demonstrator Based on an RFSoC Platform. Paderborn University; 2023.
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2023 | Bachelorsthesis | LibreCat-ID: 54242
Evers G. Bewertung der Xilinx Runtime Library zur Hardware/Software-Kommunikation. Paderborn University; 2023.
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2023 | Dissertation | LibreCat-ID: 46482 |
Sprenger A. Testinstrumente und Testdatenanalyse zur Verarbeitung von Unsicherheiten in Logikblöcken hochintegrierter Schaltungen. Universität Paderborn; 2023. doi:10.17619/UNIPB/1-1787
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2022 | Dissertation | LibreCat-ID: 29769 |
Ahmed QA. Hardware Trojans in Reconfigurable Computing. Paderborn University, Paderborn, Germany; 2022. doi:10.17619/UNIPB/1-1271
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2022 | Dissertation | LibreCat-ID: 34041
Witschen LM. Frameworks and Methodologies for Search-Based Approximate Logic Synthesis.; 2022. doi:10.17619/UNIPB/1-1649
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2022 | Mastersthesis | LibreCat-ID: 45715
Tcheussi Ngayap VI. FreeRTOS on a MicroBlaze Soft-Core Processor with Hardware Accelerators.; 2022.
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2021 | Dissertation | LibreCat-ID: 26746 |
Wiersema T. Guaranteeing Properties of Reconfigurable Hardware Circuits with Proof-Carrying Hardware. Paderborn University; 2021.
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2021 | Mastersthesis | LibreCat-ID: 29151
Kashikar C. A Comparison of Machine Learning Techniques for the On-Line Characterization of Tasks Executed on Heterogeneous Compute Nodes. Paderborn University; 2021.
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2021 | Bachelorsthesis | LibreCat-ID: 22216
Rehnen JW. Decomposition of Arithmetic Components for the Approximate Circuit Synthesis with EvoApproxLib.; 2021.
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2021 | Bachelorsthesis | LibreCat-ID: 22483
Brede M. Implementation and Profiling of XCS in the Context of Embedded Systems. Paderborn: Paderborn University; 2021.
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2021 | Mastersthesis | LibreCat-ID: 29540
Sheikh MA. Design and Implementation of a ReconROS-Based Obstacle Avoidance System. Paderborn University; 2021.
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2020 | Mastersthesis | LibreCat-ID: 21324
Chandrakar K. Comparison of Feature Selection Techniques to Improve Approximate Circuit Synthesis.; 2020.
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2020 | Bachelorsthesis | LibreCat-ID: 21432
Henke L-S. Evaluation of a ReconOS-ROS Combination Based on a Video Processing Application.; 2020.
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2020 | Bachelorsthesis | LibreCat-ID: 20820
Thiele S. Implementing Machine Learning Functions as PYNQ FPGA Overlays.; 2020.
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2020 | Mastersthesis | LibreCat-ID: 20821
Jaganath V. Extension and Evaluation of Python-Based High-Level Synthesis Tool Flows.; 2020.
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2020 | Mastersthesis | LibreCat-ID: 21433
Jentzsch FP. Design and Implementation of a ReconOS-Based TensorFlow Lite Delegate Architecture.; 2020.
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2019 | Mastersthesis | LibreCat-ID: 15920
Keerthipati M. A Bitstream-Level Proof-Carrying Hardware Technique for Information Flow Tracking. Universität Paderborn; 2019.
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2019 | Mastersthesis | LibreCat-ID: 14831
Sabu NS. FPGA Acceleration of String Search Techniques in Huge Data Sets. Paderborn University; 2019.
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2019 | Mastersthesis | LibreCat-ID: 14546
Hansmeier T. Autonomous Operation of High-Performance Compute Nodes through Self-Awareness and Learning Classifiers. Universität Paderborn; 2019.
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2019 | Mastersthesis | LibreCat-ID: 15874 |
Lienen C. Implementing a Real-Time System on a Platform FPGA Operated with ReconOS. Universität Paderborn
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2018 | Bachelorsthesis | LibreCat-ID: 3365
Schnuer J-P. Static Scheduling Algorithms for Heterogeneous Compute Nodes. Universität Paderborn; 2018.
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2018 | Bachelorsthesis | LibreCat-ID: 3366
Croce M. Evaluation of OpenCL-Based Compilation for FPGAs. Universität Paderborn; 2018.
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2018 | Dissertation | LibreCat-ID: 3720
Ho N. FPGA-Based Reconfigurable Cache Mapping Schemes: Design and Optimization. Universität Paderborn; 2018. doi:10.17619/UNIPB/1-376
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2017 | Bachelorsthesis | LibreCat-ID: 3580
Hansmeier T. An FPGA Accelerator for Checking Resolution Proofs. Universität Paderborn; 2017.
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2017 | Mastersthesis | LibreCat-ID: 1157
Witschen LM. A Framework for the Synthesis of Approximate Circuits. Universität Paderborn; 2017.
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2017 | Mastersthesis | LibreCat-ID: 74
Knorr C. OpenCL-basierte Videoverarbeitung auf heterogenen Rechenknoten. Universität Paderborn; 2017.
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2015 | Bachelorsthesis | LibreCat-ID: 3364
Knorr C. Evaluation von Bildverarbeitungsalgorithmen in heterogenen Rechenknoten. Universität Paderborn; 2015.
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2014 | Mastersthesis | LibreCat-ID: 10701
Koch B. Hardware Acceleration of Mechatronic Controllers on a Zynq Platform FPGA. Paderborn University; 2014.
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2014 | Dissertation | LibreCat-ID: 10733
Schäfers L. Parallel Monte-Carlo Tree Search for HPC Systems and Its Application to Computer Go. Berlin: Logos Verlag Berlin GmbH; 2014.
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2014 | Mastersthesis | LibreCat-ID: 10744
Surmund S. Multithreaded Parallelization of Mechatronic Controllers on a Zynq Platform FPGA. Paderborn University; 2014.
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2013 | Dissertation | LibreCat-ID: 11619
Kaufmann P. Adapting Hardware Systems by Means of Multi-Objective Evolution. Berlin: Logos Verlag Berlin GmbH; 2013.
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2013 | Dissertation | LibreCat-ID: 501
Happe M. Performance and Thermal Management on Self-Adaptive Hybrid Multi-Cores. Berlin: Logos Verlag Berlin GmbH; 2013.
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2012 | Dissertation | LibreCat-ID: 586 |
Drzevitzky S. Proof-Carrying Hardware: A Novel Approach to Reconfigurable Hardware Security. Universität Paderborn; 2012.
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2012 | Dissertation | LibreCat-ID: 10652
Giefers H. Design and Programming of Reconfigurable Mesh Based Many-Cores. Berlin: Logos Verlag Berlin GmbH; 2012.
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