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1920 Publications
2014 | Journal Article | LibreCat-ID: 10603
Giefers, Heiner, and Marco Platzner. “An FPGA-Based Reconfigurable Mesh Many-Core.” IEEE Transactions on Computers, vol. 63, no. 12, 2014, pp. 2919–32, doi:10.1109/TC.2013.174.
LibreCat
| DOI
2014 | Conference Paper | LibreCat-ID: 10621
Anwer, Jahanzeb, et al. “FPGA Redundancy Configurations: An Automated Design Space Exploration.” Reconfigurable Architectures Workshop (RAW), 2014, doi:10.1109/IPDPSW.2014.37.
LibreCat
| DOI
2014 | Bachelorsthesis | LibreCat-ID: 10627
Bockhorn, Arne. Echtzeit Klassifikation von SEMG Signalen Mit Einem Low-Cost DSP Evaluation Board. Paderborn University, 2014.
LibreCat
2014 | Conference Paper | LibreCat-ID: 10632
Boschmann, Alexander, and Marco Platzner. “A Computer Vision-Based Approach to High Density EMG Pattern Recognition Using Structural Similarity.” Proc. MyoElectric Controls Symposium (MEC), 2014.
LibreCat
2014 | Conference Paper | LibreCat-ID: 10633
Boschmann, Alexander, and Marco Platzner. “Towards Robust HD EMG Pattern Recognition: Reducing Electrode Displacement Effect Using Structural Similarity.” Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC), 2014.
LibreCat
2014 | Mastersthesis | LibreCat-ID: 10640
Brand, Marcel. A Generalized Loop Accelerator Implemented as a Coarse-Grained Array. Paderborn University, 2014.
LibreCat
2014 | Mastersthesis | LibreCat-ID: 10645
Damschen, Marvin. Easy-to-Use-on-the-Fly Binary Program Acceleration on Many-Cores. Paderborn University, 2014.
LibreCat
2014 | Conference Paper | LibreCat-ID: 10654
Glette, Kyrre, and Paul Kaufmann. “Lookup Table Partial Reconfiguration for an Evolvable Hardware Classifier System.” IEEE Congress on Evolutionary Computation (CEC), 2014.
LibreCat
2014 | Bachelorsthesis | LibreCat-ID: 10665
Hagedorn, Christoph. Entwicklung Einer Codegrößenoptimierten Softwarebibliothek Für 8-Bit Mikrocontroller in Netzunabhängigen Notleuchten. Paderborn University, 2014.
LibreCat
2014 | Conference Paper | LibreCat-ID: 10674
Ho, Nam, et al. “A Hardware/Software Infrastructure for Performance Monitoring on LEON3 Multicore Platforms.” 24th Intl. Conf. on Field Programmable Logic and Applications (FPL), 2014, pp. 1–4, doi:10.1109/FPL.2014.6927437.
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| DOI