Bastian Koppelmann

kbastian@mail.uni-paderborn.de
ID
25260

22 Publications

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[22]
2023 | Conference Paper | LibreCat-ID: 45776
@inproceedings{Ecker_Krstic_Ulbricht_Mauderer_Jentzsch_Koch_Koppelmann_Müller_Sadiye_Bruns_et al._2023, title={Scale4Edge – Scaling RISC-V for Edge Applications}, booktitle={RISC-V Summit Europe 2023, Barcelona, Spain, June 2023.}, author={Ecker, Wolfgang and Krstic, Milos and Ulbricht, Markus and Mauderer, Andreas and Jentzsch, Eyck and Koch, Andreas and Koppelmann, Bastian and Müller, Wolfgang and Sadiye, Babak and Bruns, Niklas and et al.}, year={2023} }
LibreCat | Files available
 
[21]
2021 | Conference Paper | LibreCat-ID: 32125
@inproceedings{Adelt_Koppelmann_Müller_Scheytt_2021, place={Munich, DE}, title={Register and Instruction Coverage Analysis for Different RISC-V ISA Modules}, booktitle={MBMV 2021 - Methods and Description Languages for Modelling and Verification of Circuits and Systems; GMM/ITG/GI-Workshop}, publisher={VDE}, author={Adelt, Peer and Koppelmann, Bastian and Müller, Wolfgang and Scheytt, Christoph}, year={2021} }
LibreCat | Files available
 
[20]
2021 | Conference Paper | LibreCat-ID: 32132
@inproceedings{Adelt_Koppelmann_Müller_Scheytt_2021, place={Munich, DE}, title={QEMU zur Simulation von Worst-Case-Ausführungszeiten}, booktitle={MBMV 2021 - Methods and Description Languages for Modelling and Verification of Circuits and Systems; GMM/ITG/GI-Workshop}, publisher={VDE}, author={Adelt, Peer and Koppelmann, Bastian and Müller, Wolfgang and Scheytt, Christoph}, year={2021} }
LibreCat
 
[19]
2021 | Conference Paper | LibreCat-ID: 23992
@inproceedings{Adelt_Koppelmann_Müller_Scheytt_2021, title={Register and Instruction Coverage Analysis for Different RISC-V ISA Modules}, booktitle={Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV 2021)}, author={Adelt, Peer and Koppelmann, Bastian and Müller, Wolfgang and Scheytt, Christoph}, year={2021} }
LibreCat
 
[18]
2020 | Conference Paper | LibreCat-ID: 24027
@inproceedings{Adelt_Koppelmann_Müller_Scheytt_2020, place={Stuttgart, DE}, title={A Scalable Platform for QEMU Based Fault Effect Analysis for RISC-V Hardware Architectures}, booktitle={MBMV 2020 - Methods and Description Languages for Modelling and Verification of Circuits and Systems; GMM/ITG/GI-Workshop}, author={Adelt, Peer and Koppelmann, Bastian and Müller, Wolfgang and Scheytt, Christoph}, year={2020} }
LibreCat | Files available
 
[17]
2020 | Conference Paper | LibreCat-ID: 24023
@inproceedings{Bahmanian_Fard_Koppelmann_Scheytt_2020, place={Los Angeles, CA, USA, USA}, title={Wide-Band Frequency Synthesizer with Ultra-Low Phase Noise Using an Optical Clock Source}, DOI={10.1109/IMS30576.2020.9224118}, booktitle={ 2020 IEEE/MTT-S International Microwave Symposium (IMS)}, publisher={IEEE}, author={Bahmanian, Meysam and Fard, Saeed and Koppelmann, Bastian and Scheytt, Christoph}, year={2020} }
LibreCat | Files available | DOI
 
[16]
2019 | Conference Paper | LibreCat-ID: 24058
@inproceedings{Koppelmann_Adelt_Müller_Scheytt_2019, place={Rhodos, Griechenland}, title={RISC-V Extensions for Bit Manipulation Instructions}, DOI={10.1109/PATMOS.2019.8862170}, booktitle={29th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS)}, author={Koppelmann, Bastian and Adelt, Peer and Müller, Wolfgang and Scheytt, Christoph}, year={2019} }
LibreCat | Files available | DOI
 
[15]
2019 | Conference Paper | LibreCat-ID: 24060
@inproceedings{Adelt_Koppelmann_Müller_Scheytt_2019, place={Kaiserslautern, DE}, title={Analyse sicherheitskritischer Software für RISC-V Prozessoren}, booktitle={MBMV 2019-22.Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV 2019)}, author={Adelt, Peer and Koppelmann, Bastian and Müller, Wolfgang and Scheytt, Christoph}, year={2019} }
LibreCat | Files available
 
[14]
2019 | Conference Paper | LibreCat-ID: 24061
@inproceedings{Adelt_Koppelmann_Müller_Scheytt_Driessen_2019, place={Florence, Italy}, title={QEMU for Dynamic Memory Analysis of Security Sensitive Software}, booktitle={ 2nd International Workshop on Embedded Software for Industrial IoT in conjunction with DATE 2019}, author={Adelt, Peer and Koppelmann, Bastian and Müller, Wolfgang and Scheytt, Christoph and Driessen, Benedikt}, year={2019}, pages={32–34} }
LibreCat | Files available
 
[13]
2019 | Journal Article | LibreCat-ID: 24063
@article{Adelt_Koppelmann_Müller_Scheytt_2019, title={QEMU Support for RISC-V: Current State and Future Releases}, volume={(Presentation)}, journal={2nd International Workshop on RISC-V Research Activities}, author={Adelt, Peer and Koppelmann, Bastian and Müller, Wolfgang and Scheytt, Christoph}, year={2019} }
LibreCat | Files available
 
[12]
2018 | Journal Article | LibreCat-ID: 24194
@article{Adelt_Koppelmann_Müller_2018, title={Current and Future RISC-V Activities for Virtual Prototyping and Chip Design}, volume={Presentation}, journal={International Workshop on RISC-V Research Activities}, author={Adelt, Peer and Koppelmann, Bastian and Müller, Wolfgang}, year={2018} }
LibreCat | Files available
 
[11]
2017 | Conference Paper | LibreCat-ID: 24220
@inproceedings{Adelt_Koppelmann_Müller_Mueller-Gritschneder_Kleinjohann_Scheytt_2017, place={Germany, Paderborn}, title={Automatisierte Fehlerinjektion zur Entwicklung sicherer Mikrocontrolleranwendungen auf der Basis virtueller Plattformen}, DOI={10.17619/UNIPB/1-93}, booktitle={Tagungsband des Wissenschaftsforums Intelligente Technische Systeme}, publisher={Verlagsschriftenreihe des Heinz Nixdorf Instituts}, author={Adelt, Peer and Koppelmann, Bastian and Müller, Wolfgang and Mueller-Gritschneder, Daniel and Kleinjohann, Bernd and Scheytt, Christoph}, year={2017} }
LibreCat | Files available | DOI
 
[10]
2017 | Conference Paper | LibreCat-ID: 24224
@inproceedings{Adelt_Koppelmann_Müller_Kleinjohann_Scheytt_2017, place={Lausanne, CH}, title={ANALISA - A Tool for Static Instruction Set Analysis}, booktitle={Design Automation and Testing in Europe (DATE), University Booth Interactive Presentation}, author={Adelt, Peer and Koppelmann, Bastian and Müller, Wolfgang and Kleinjohann, Bernd and Scheytt, Christoph}, year={2017} }
LibreCat | Files available
 
[9]
2017 | Conference Paper | LibreCat-ID: 24225
@inproceedings{Adelt_Koppelmann_Müller_Kleinjohann_Scheytt_2017, place={Lausanne, Switzerland}, title={An Automatic Injection Framework for Safety Assessements of Embedded Software Binaries}, booktitle={2nd Workshop on Resiliency in Embedded Electronic Systems (REES) }, author={Adelt, Peer and Koppelmann, Bastian and Müller, Wolfgang and Kleinjohann, Bernd and Scheytt, Christoph}, year={2017}, pages={44} }
LibreCat | Files available
 
[8]
2017 | Conference Paper | LibreCat-ID: 25068
@inproceedings{Adelt_Koppelmann_Müller_Kleinjohann_Scheytt_2017, title={ANALISA - A Tool for Static Instruction Set Analysis}, booktitle={Design Automation and Testing in Europe (DATE)}, author={Adelt, Peer and Koppelmann, Bastian and Müller, Wolfgang and Kleinjohann, Bernd and Scheytt, J. Christoph}, editor={University Booth Interactive Presentation}, year={2017} }
LibreCat
 
[7]
2017 | Conference Paper | LibreCat-ID: 25069
@inproceedings{Adelt_Koppelmann_Müller_Kleinjohann_Scheytt_2017, title={ANALISA - A Tool for Static Instruction Set Analysis}, booktitle={Design Automation and Testing in Europe (DATE)}, author={Adelt, Peer and Koppelmann, Bastian and Müller, Wolfgang and Kleinjohann, Bernd and Scheytt, J. Christoph}, editor={University Booth Interactive Presentation}, year={2017} }
LibreCat
 
[6]
2016 | Conference Paper | LibreCat-ID: 24264
@inproceedings{Adelt_Koppelmann_Müller_Becker_Kleinjohann_Scheytt_2016, place={Tallin, Estonia}, title={Fast Dynamic Fault Injection for Virtual Microcontroller Platforms}, DOI={10.1109/VLSI-SoC.2016.7753545}, booktitle={Proceedings of the IEEE/IFIP International Conference on VLSI (VLSI-SOC)}, author={Adelt, Peer and Koppelmann, Bastian and Müller, Wolfgang and Becker, Markus and Kleinjohann, Bernd and Scheytt, Christoph}, year={2016} }
LibreCat | Files available | DOI
 
[5]
2014 | Conference Paper | LibreCat-ID: 25161
@inproceedings{Koppelmann_Becker_Müller_2014, title={Portierung der TriCore-Architektur auf QEMU}, booktitle={17. Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV 2014) }, author={Koppelmann, Bastian and Becker, Markus and Müller, Wolfgang}, year={2014} }
LibreCat
 
[4]
2014 | Journal Article | LibreCat-ID: 24302
@article{Koppelmann_Messidat_Becker_Kuznik_Müller_Scheytt_2014, title={Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU}, journal={Design and Verification Conference (DVCON EUROPE)}, author={Koppelmann, Bastian and Messidat, Bernd and Becker, Markus and Kuznik, Christoph and Müller, Wolfgang and Scheytt, Christoph}, year={2014} }
LibreCat | Files available
 
[3]
2014 | Conference Paper | LibreCat-ID: 34585
@inproceedings{Koppelmann_Messidat_Becker_Müller_Scheytt_2014, place={München}, title={Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU}, booktitle={Proceedings of the Design and Verification Conference Europe (DVCON Europe)}, author={Koppelmann, Bastian and Messidat, Bernd and Becker, Markus and Müller, Wolfgang and Scheytt, J. Christoph}, year={2014} }
LibreCat
 
[2]
2014 | Conference Paper | LibreCat-ID: 34583
@inproceedings{Koppelmann_Messidat_Kuznik_Müller_Becker_Scheytt_2014, place={München}, title={Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU}, booktitle={Proceedings of the Design and Verification Conference Europe (DVCON Europe)}, author={Koppelmann, Bastian and Messidat, Bernd and Kuznik, Christoph and Müller, Wolfgang and Becker, Markus and Scheytt, J. Christoph}, year={2014} }
LibreCat
 
[1]
2014 | Journal Article | LibreCat-ID: 25117
@article{Koppelmann_Messidat_Becker_Kuznik_Müller_Scheytt_2014, title={Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU}, journal={Design and Verification Conference (DVCON EUROPE)}, author={Koppelmann, Bastian and Messidat, Bernd and Becker, Markus and Kuznik, Christoph and Müller, Wolfgang and Scheytt, J. Christoph}, year={2014} }
LibreCat
 
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22 Publications

Mark all

[22]
2023 | Conference Paper | LibreCat-ID: 45776
@inproceedings{Ecker_Krstic_Ulbricht_Mauderer_Jentzsch_Koch_Koppelmann_Müller_Sadiye_Bruns_et al._2023, title={Scale4Edge – Scaling RISC-V for Edge Applications}, booktitle={RISC-V Summit Europe 2023, Barcelona, Spain, June 2023.}, author={Ecker, Wolfgang and Krstic, Milos and Ulbricht, Markus and Mauderer, Andreas and Jentzsch, Eyck and Koch, Andreas and Koppelmann, Bastian and Müller, Wolfgang and Sadiye, Babak and Bruns, Niklas and et al.}, year={2023} }
LibreCat | Files available
 
[21]
2021 | Conference Paper | LibreCat-ID: 32125
@inproceedings{Adelt_Koppelmann_Müller_Scheytt_2021, place={Munich, DE}, title={Register and Instruction Coverage Analysis for Different RISC-V ISA Modules}, booktitle={MBMV 2021 - Methods and Description Languages for Modelling and Verification of Circuits and Systems; GMM/ITG/GI-Workshop}, publisher={VDE}, author={Adelt, Peer and Koppelmann, Bastian and Müller, Wolfgang and Scheytt, Christoph}, year={2021} }
LibreCat | Files available
 
[20]
2021 | Conference Paper | LibreCat-ID: 32132
@inproceedings{Adelt_Koppelmann_Müller_Scheytt_2021, place={Munich, DE}, title={QEMU zur Simulation von Worst-Case-Ausführungszeiten}, booktitle={MBMV 2021 - Methods and Description Languages for Modelling and Verification of Circuits and Systems; GMM/ITG/GI-Workshop}, publisher={VDE}, author={Adelt, Peer and Koppelmann, Bastian and Müller, Wolfgang and Scheytt, Christoph}, year={2021} }
LibreCat
 
[19]
2021 | Conference Paper | LibreCat-ID: 23992
@inproceedings{Adelt_Koppelmann_Müller_Scheytt_2021, title={Register and Instruction Coverage Analysis for Different RISC-V ISA Modules}, booktitle={Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV 2021)}, author={Adelt, Peer and Koppelmann, Bastian and Müller, Wolfgang and Scheytt, Christoph}, year={2021} }
LibreCat
 
[18]
2020 | Conference Paper | LibreCat-ID: 24027
@inproceedings{Adelt_Koppelmann_Müller_Scheytt_2020, place={Stuttgart, DE}, title={A Scalable Platform for QEMU Based Fault Effect Analysis for RISC-V Hardware Architectures}, booktitle={MBMV 2020 - Methods and Description Languages for Modelling and Verification of Circuits and Systems; GMM/ITG/GI-Workshop}, author={Adelt, Peer and Koppelmann, Bastian and Müller, Wolfgang and Scheytt, Christoph}, year={2020} }
LibreCat | Files available
 
[17]
2020 | Conference Paper | LibreCat-ID: 24023
@inproceedings{Bahmanian_Fard_Koppelmann_Scheytt_2020, place={Los Angeles, CA, USA, USA}, title={Wide-Band Frequency Synthesizer with Ultra-Low Phase Noise Using an Optical Clock Source}, DOI={10.1109/IMS30576.2020.9224118}, booktitle={ 2020 IEEE/MTT-S International Microwave Symposium (IMS)}, publisher={IEEE}, author={Bahmanian, Meysam and Fard, Saeed and Koppelmann, Bastian and Scheytt, Christoph}, year={2020} }
LibreCat | Files available | DOI
 
[16]
2019 | Conference Paper | LibreCat-ID: 24058
@inproceedings{Koppelmann_Adelt_Müller_Scheytt_2019, place={Rhodos, Griechenland}, title={RISC-V Extensions for Bit Manipulation Instructions}, DOI={10.1109/PATMOS.2019.8862170}, booktitle={29th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS)}, author={Koppelmann, Bastian and Adelt, Peer and Müller, Wolfgang and Scheytt, Christoph}, year={2019} }
LibreCat | Files available | DOI
 
[15]
2019 | Conference Paper | LibreCat-ID: 24060
@inproceedings{Adelt_Koppelmann_Müller_Scheytt_2019, place={Kaiserslautern, DE}, title={Analyse sicherheitskritischer Software für RISC-V Prozessoren}, booktitle={MBMV 2019-22.Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV 2019)}, author={Adelt, Peer and Koppelmann, Bastian and Müller, Wolfgang and Scheytt, Christoph}, year={2019} }
LibreCat | Files available
 
[14]
2019 | Conference Paper | LibreCat-ID: 24061
@inproceedings{Adelt_Koppelmann_Müller_Scheytt_Driessen_2019, place={Florence, Italy}, title={QEMU for Dynamic Memory Analysis of Security Sensitive Software}, booktitle={ 2nd International Workshop on Embedded Software for Industrial IoT in conjunction with DATE 2019}, author={Adelt, Peer and Koppelmann, Bastian and Müller, Wolfgang and Scheytt, Christoph and Driessen, Benedikt}, year={2019}, pages={32–34} }
LibreCat | Files available
 
[13]
2019 | Journal Article | LibreCat-ID: 24063
@article{Adelt_Koppelmann_Müller_Scheytt_2019, title={QEMU Support for RISC-V: Current State and Future Releases}, volume={(Presentation)}, journal={2nd International Workshop on RISC-V Research Activities}, author={Adelt, Peer and Koppelmann, Bastian and Müller, Wolfgang and Scheytt, Christoph}, year={2019} }
LibreCat | Files available
 
[12]
2018 | Journal Article | LibreCat-ID: 24194
@article{Adelt_Koppelmann_Müller_2018, title={Current and Future RISC-V Activities for Virtual Prototyping and Chip Design}, volume={Presentation}, journal={International Workshop on RISC-V Research Activities}, author={Adelt, Peer and Koppelmann, Bastian and Müller, Wolfgang}, year={2018} }
LibreCat | Files available
 
[11]
2017 | Conference Paper | LibreCat-ID: 24220
@inproceedings{Adelt_Koppelmann_Müller_Mueller-Gritschneder_Kleinjohann_Scheytt_2017, place={Germany, Paderborn}, title={Automatisierte Fehlerinjektion zur Entwicklung sicherer Mikrocontrolleranwendungen auf der Basis virtueller Plattformen}, DOI={10.17619/UNIPB/1-93}, booktitle={Tagungsband des Wissenschaftsforums Intelligente Technische Systeme}, publisher={Verlagsschriftenreihe des Heinz Nixdorf Instituts}, author={Adelt, Peer and Koppelmann, Bastian and Müller, Wolfgang and Mueller-Gritschneder, Daniel and Kleinjohann, Bernd and Scheytt, Christoph}, year={2017} }
LibreCat | Files available | DOI
 
[10]
2017 | Conference Paper | LibreCat-ID: 24224
@inproceedings{Adelt_Koppelmann_Müller_Kleinjohann_Scheytt_2017, place={Lausanne, CH}, title={ANALISA - A Tool for Static Instruction Set Analysis}, booktitle={Design Automation and Testing in Europe (DATE), University Booth Interactive Presentation}, author={Adelt, Peer and Koppelmann, Bastian and Müller, Wolfgang and Kleinjohann, Bernd and Scheytt, Christoph}, year={2017} }
LibreCat | Files available
 
[9]
2017 | Conference Paper | LibreCat-ID: 24225
@inproceedings{Adelt_Koppelmann_Müller_Kleinjohann_Scheytt_2017, place={Lausanne, Switzerland}, title={An Automatic Injection Framework for Safety Assessements of Embedded Software Binaries}, booktitle={2nd Workshop on Resiliency in Embedded Electronic Systems (REES) }, author={Adelt, Peer and Koppelmann, Bastian and Müller, Wolfgang and Kleinjohann, Bernd and Scheytt, Christoph}, year={2017}, pages={44} }
LibreCat | Files available
 
[8]
2017 | Conference Paper | LibreCat-ID: 25068
@inproceedings{Adelt_Koppelmann_Müller_Kleinjohann_Scheytt_2017, title={ANALISA - A Tool for Static Instruction Set Analysis}, booktitle={Design Automation and Testing in Europe (DATE)}, author={Adelt, Peer and Koppelmann, Bastian and Müller, Wolfgang and Kleinjohann, Bernd and Scheytt, J. Christoph}, editor={University Booth Interactive Presentation}, year={2017} }
LibreCat
 
[7]
2017 | Conference Paper | LibreCat-ID: 25069
@inproceedings{Adelt_Koppelmann_Müller_Kleinjohann_Scheytt_2017, title={ANALISA - A Tool for Static Instruction Set Analysis}, booktitle={Design Automation and Testing in Europe (DATE)}, author={Adelt, Peer and Koppelmann, Bastian and Müller, Wolfgang and Kleinjohann, Bernd and Scheytt, J. Christoph}, editor={University Booth Interactive Presentation}, year={2017} }
LibreCat
 
[6]
2016 | Conference Paper | LibreCat-ID: 24264
@inproceedings{Adelt_Koppelmann_Müller_Becker_Kleinjohann_Scheytt_2016, place={Tallin, Estonia}, title={Fast Dynamic Fault Injection for Virtual Microcontroller Platforms}, DOI={10.1109/VLSI-SoC.2016.7753545}, booktitle={Proceedings of the IEEE/IFIP International Conference on VLSI (VLSI-SOC)}, author={Adelt, Peer and Koppelmann, Bastian and Müller, Wolfgang and Becker, Markus and Kleinjohann, Bernd and Scheytt, Christoph}, year={2016} }
LibreCat | Files available | DOI
 
[5]
2014 | Conference Paper | LibreCat-ID: 25161
@inproceedings{Koppelmann_Becker_Müller_2014, title={Portierung der TriCore-Architektur auf QEMU}, booktitle={17. Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV 2014) }, author={Koppelmann, Bastian and Becker, Markus and Müller, Wolfgang}, year={2014} }
LibreCat
 
[4]
2014 | Journal Article | LibreCat-ID: 24302
@article{Koppelmann_Messidat_Becker_Kuznik_Müller_Scheytt_2014, title={Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU}, journal={Design and Verification Conference (DVCON EUROPE)}, author={Koppelmann, Bastian and Messidat, Bernd and Becker, Markus and Kuznik, Christoph and Müller, Wolfgang and Scheytt, Christoph}, year={2014} }
LibreCat | Files available
 
[3]
2014 | Conference Paper | LibreCat-ID: 34585
@inproceedings{Koppelmann_Messidat_Becker_Müller_Scheytt_2014, place={München}, title={Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU}, booktitle={Proceedings of the Design and Verification Conference Europe (DVCON Europe)}, author={Koppelmann, Bastian and Messidat, Bernd and Becker, Markus and Müller, Wolfgang and Scheytt, J. Christoph}, year={2014} }
LibreCat
 
[2]
2014 | Conference Paper | LibreCat-ID: 34583
@inproceedings{Koppelmann_Messidat_Kuznik_Müller_Becker_Scheytt_2014, place={München}, title={Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU}, booktitle={Proceedings of the Design and Verification Conference Europe (DVCON Europe)}, author={Koppelmann, Bastian and Messidat, Bernd and Kuznik, Christoph and Müller, Wolfgang and Becker, Markus and Scheytt, J. Christoph}, year={2014} }
LibreCat
 
[1]
2014 | Journal Article | LibreCat-ID: 25117
@article{Koppelmann_Messidat_Becker_Kuznik_Müller_Scheytt_2014, title={Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU}, journal={Design and Verification Conference (DVCON EUROPE)}, author={Koppelmann, Bastian and Messidat, Bernd and Becker, Markus and Kuznik, Christoph and Müller, Wolfgang and Scheytt, J. Christoph}, year={2014} }
LibreCat
 
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