The Impact of Manufacturing Defects on the Fault Tolerance of TMR-Systems

M. Hunger, S. Hellebrand, in: {25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT’10)}, {IEEE}, Kyoto, Japan, 2010, pp. 101–108.

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Conference Paper | English
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{25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'10)}
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101-108
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Hunger M, Hellebrand S. The Impact of Manufacturing Defects on the Fault Tolerance of TMR-Systems. In: {25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT’10)}. Kyoto, Japan: {IEEE}; 2010:101-108. doi:10.1109/dft.2010.19
Hunger, M., & Hellebrand, S. (2010). The Impact of Manufacturing Defects on the Fault Tolerance of TMR-Systems. In {25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT’10)} (pp. 101–108). Kyoto, Japan: {IEEE}. https://doi.org/10.1109/dft.2010.19
@inproceedings{Hunger_Hellebrand_2010, place={Kyoto, Japan}, title={The Impact of Manufacturing Defects on the Fault Tolerance of TMR-Systems}, DOI={10.1109/dft.2010.19}, booktitle={{25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT’10)}}, publisher={{IEEE}}, author={Hunger, Marc and Hellebrand, Sybille}, year={2010}, pages={101–108} }
Hunger, Marc, and Sybille Hellebrand. “The Impact of Manufacturing Defects on the Fault Tolerance of TMR-Systems.” In {25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT’10)}, 101–8. Kyoto, Japan: {IEEE}, 2010. https://doi.org/10.1109/dft.2010.19.
M. Hunger and S. Hellebrand, “The Impact of Manufacturing Defects on the Fault Tolerance of TMR-Systems,” in {25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT’10)}, 2010, pp. 101–108.
Hunger, Marc, and Sybille Hellebrand. “The Impact of Manufacturing Defects on the Fault Tolerance of TMR-Systems.” {25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT’10)}, {IEEE}, 2010, pp. 101–08, doi:10.1109/dft.2010.19.

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