An Integrated Built-In Test and Repair Approach for Memories with 2D Redundancy

P. Oehler, S. Hellebrand, H.-J. Wunderlich, in: 12th IEEE European Test Symposium (ETS’07), IEEE, Freiburg, Germany, 2007, pp. 91–96.

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Conference Paper | English
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Oehler, Philipp; Hellebrand, SybilleLibreCat ; Wunderlich, Hans-Joachim
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12th IEEE European Test Symposium (ETS'07)
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91-96
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Oehler P, Hellebrand S, Wunderlich H-J. An Integrated Built-In Test and Repair Approach for Memories with 2D Redundancy. In: 12th IEEE European Test Symposium (ETS’07). IEEE; 2007:91-96. doi:10.1109/ets.2007.10
Oehler, P., Hellebrand, S., & Wunderlich, H.-J. (2007). An Integrated Built-In Test and Repair Approach for Memories with 2D Redundancy. 12th IEEE European Test Symposium (ETS’07), 91–96. https://doi.org/10.1109/ets.2007.10
@inproceedings{Oehler_Hellebrand_Wunderlich_2007, place={Freiburg, Germany}, title={An Integrated Built-In Test and Repair Approach for Memories with 2D Redundancy}, DOI={10.1109/ets.2007.10}, booktitle={12th IEEE European Test Symposium (ETS’07)}, publisher={IEEE}, author={Oehler, Philipp and Hellebrand, Sybille and Wunderlich, Hans-Joachim}, year={2007}, pages={91–96} }
Oehler, Philipp, Sybille Hellebrand, and Hans-Joachim Wunderlich. “An Integrated Built-In Test and Repair Approach for Memories with 2D Redundancy.” In 12th IEEE European Test Symposium (ETS’07), 91–96. Freiburg, Germany: IEEE, 2007. https://doi.org/10.1109/ets.2007.10.
P. Oehler, S. Hellebrand, and H.-J. Wunderlich, “An Integrated Built-In Test and Repair Approach for Memories with 2D Redundancy,” in 12th IEEE European Test Symposium (ETS’07), 2007, pp. 91–96, doi: 10.1109/ets.2007.10.
Oehler, Philipp, et al. “An Integrated Built-In Test and Repair Approach for Memories with 2D Redundancy.” 12th IEEE European Test Symposium (ETS’07), IEEE, 2007, pp. 91–96, doi:10.1109/ets.2007.10.

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