Mixed-Mode BIST Using Embedded Processors

S. Hellebrand, H.-J. Wunderlich, A. Hertwig, in: IEEE International Test Conference (ITC’96), IEEE, Washington, DC, USA, 1996, pp. 195–204.

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Conference Paper | English
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Hellebrand, SybilleLibreCat ; Wunderlich, Hans-Joachim; Hertwig, Andre
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IEEE International Test Conference (ITC'96)
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195-204
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Hellebrand S, Wunderlich H-J, Hertwig A. Mixed-Mode BIST Using Embedded Processors. In: IEEE International Test Conference (ITC’96). IEEE; 1996:195-204. doi:10.1109/test.1996.556962
Hellebrand, S., Wunderlich, H.-J., & Hertwig, A. (1996). Mixed-Mode BIST Using Embedded Processors. IEEE International Test Conference (ITC’96), 195–204. https://doi.org/10.1109/test.1996.556962
@inproceedings{Hellebrand_Wunderlich_Hertwig_1996, place={Washington, DC, USA}, title={Mixed-Mode BIST Using Embedded Processors}, DOI={10.1109/test.1996.556962}, booktitle={IEEE International Test Conference (ITC’96)}, publisher={IEEE}, author={Hellebrand, Sybille and Wunderlich, Hans-Joachim and Hertwig, Andre}, year={1996}, pages={195–204} }
Hellebrand, Sybille, Hans-Joachim Wunderlich, and Andre Hertwig. “Mixed-Mode BIST Using Embedded Processors.” In IEEE International Test Conference (ITC’96), 195–204. Washington, DC, USA: IEEE, 1996. https://doi.org/10.1109/test.1996.556962.
S. Hellebrand, H.-J. Wunderlich, and A. Hertwig, “Mixed-Mode BIST Using Embedded Processors,” in IEEE International Test Conference (ITC’96), 1996, pp. 195–204, doi: 10.1109/test.1996.556962.
Hellebrand, Sybille, et al. “Mixed-Mode BIST Using Embedded Processors.” IEEE International Test Conference (ITC’96), IEEE, 1996, pp. 195–204, doi:10.1109/test.1996.556962.

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