Mixed-Mode BIST Using Embedded Processors
S. Hellebrand, H.-J. Wunderlich, A. Hertwig, Journal of Electronic Testing Theory and Applications - JETTA 12 (1998) 127–138.
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Journal Article
| English
Author
Hellebrand, SybilleLibreCat 
;
Wunderlich, Hans-Joachim;
Hertwig, Andre
;
Wunderlich, Hans-Joachim;
Hertwig, AndreDepartment
Publishing Year
Journal Title
Journal of Electronic Testing Theory and Applications - JETTA
Volume
12
Issue
1/2
Page
127-138
LibreCat-ID
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Hellebrand S, Wunderlich H-J, Hertwig A. Mixed-Mode BIST Using Embedded Processors. Journal of Electronic Testing Theory and Applications - JETTA. 1998;12(1/2):127-138.
Hellebrand, S., Wunderlich, H.-J., & Hertwig, A. (1998). Mixed-Mode BIST Using Embedded Processors. Journal of Electronic Testing Theory and Applications - JETTA, 12(1/2), 127–138.
@article{Hellebrand_Wunderlich_Hertwig_1998, title={Mixed-Mode BIST Using Embedded Processors}, volume={12}, number={1/2}, journal={Journal of Electronic Testing Theory and Applications - JETTA}, author={Hellebrand, Sybille and Wunderlich, Hans-Joachim and Hertwig, Andre}, year={1998}, pages={127–138} }
Hellebrand, Sybille, Hans-Joachim Wunderlich, and Andre Hertwig. “Mixed-Mode BIST Using Embedded Processors.” Journal of Electronic Testing Theory and Applications - JETTA 12, no. 1/2 (1998): 127–38.
S. Hellebrand, H.-J. Wunderlich, and A. Hertwig, “Mixed-Mode BIST Using Embedded Processors,” Journal of Electronic Testing Theory and Applications - JETTA, vol. 12, no. 1/2, pp. 127–138, 1998.
Hellebrand, Sybille, et al. “Mixed-Mode BIST Using Embedded Processors.” Journal of Electronic Testing Theory and Applications - JETTA, vol. 12, no. 1/2, 1998, pp. 127–38.
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