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212 Publications
2024 | Conference Paper | LibreCat-ID: 54312
M. Büttner, C. Alt, T. Kenter, H. Köstler, C. Plessl, and V. Aizinger, “Enabling Performance Portability for Shallow Water Equations on CPUs, GPUs, and FPGAs with SYCL,” 2024, doi: 10.1145/3659914.3659925.
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2024 | Conference Paper | LibreCat-ID: 53503
K. Olgu, T. Kenter, J. Nunez-Yanez, and S. Mcintosh-Smith, “Optimisation and Evaluation of Breadth First Search with oneAPI/SYCL on Intel FPGAs: from Describing Algorithms to Describing Architectures,” 2024, doi: 10.1145/3648115.3648134.
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2023 | Conference Paper | LibreCat-ID: 43228
X. Wu, T. Kenter, R. Schade, T. Kühne, and C. Plessl, “Computing and Compressing Electron Repulsion Integrals on FPGAs,” in 2023 IEEE 31st Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), 2023, pp. 162–173, doi: 10.1109/FCCM57271.2023.00026.
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| arXiv
2023 | Conference Paper | LibreCat-ID: 46189
C. Prouveur, M. Haefele, T. Kenter, and N. Voss, “FPGA Acceleration for HPC Supercapacitor Simulations,” 2023, doi: 10.1145/3592979.3593419.
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2023 | Conference Paper | LibreCat-ID: 46190 |
J.-O. Opdenhövel, C. Plessl, and T. Kenter, “Mutation Tree Reconstruction of Tumor Cells on FPGAs Using a Bit-Level Matrix Representation,” 2023, doi: 10.1145/3597031.3597050.
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2023 | Conference Paper | LibreCat-ID: 46188
J. Faj, T. Kenter, S. Faghih-Naini, C. Plessl, and V. Aizinger, “Scalable Multi-FPGA Design of a Discontinuous Galerkin Shallow-Water Model on Unstructured Meshes,” 2023, doi: 10.1145/3592979.3593407.
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2022 | Conference Paper | LibreCat-ID: 46193 |
M. Karp et al., “A High-Fidelity Flow Solver for Unstructured Meshes on Field-Programmable Gate Arrays: Design, Evaluation, and Future Challenges,” 2022, doi: 10.1145/3492805.3492808.
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2022 | Preprint | LibreCat-ID: 36879 |
V. Churavy et al., “Bridging HPC Communities through the Julia Programming Language.” 2022.
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2022 | Preprint | LibreCat-ID: 32404
T. Kühne, C. Plessl, R. Schade, and O. Schütt, “CP2K on the road to exascale,” arXiv:2205.14741. 2022.
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| arXiv
2021 | Conference Paper | LibreCat-ID: 46194
T. Kenter, A. Shambhu, S. Faghih-Naini, and V. Aizinger, “Algorithm-hardware co-design of a discontinuous Galerkin shallow-water model for a dataflow architecture on FPGA,” 2021, doi: 10.1145/3468267.3470617.
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2021 | Conference Paper | LibreCat-ID: 20886
T. Nickchen, S. Heindorf, and G. Engels, “Generating Physically Sound Training Data for Image Recognition of Additively Manufactured Parts,” in Proceedings of the IEEE/CVF Winter Conference on Applications of Computer Vision, Hawaii, 2021, pp. 1994–2002.
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2021 | Conference Paper | LibreCat-ID: 46195
M. Karp et al., “High-Performance Spectral Element Methods on Field-Programmable Gate Arrays : Implementation, Evaluation, and Future Projection,” 2021, doi: 10.1109/ipdps49936.2021.00116.
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2021 | Conference Paper | LibreCat-ID: 29937
M. Karp et al., “High-Performance Spectral Element Methods on Field-Programmable Gate Arrays : Implementation, Evaluation, and Future Projection,” 2021, doi: 10.1109/ipdps49936.2021.00116.
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2021 | Conference Paper | LibreCat-ID: 27365
M. Meyer, “Towards Performance Characterization of FPGAs in Context of HPC using OpenCL Benchmarks,” 2021, doi: 10.1145/3468044.3468058.
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2020 | Conference Paper | LibreCat-ID: 16898
M. Lass, R. Schade, T. Kühne, and C. Plessl, “A Submatrix-Based Method for Approximate Matrix Function Evaluation in the Quantum Chemistry Code CP2K,” in Proc. International Conference for High Performance Computing, Networking, Storage and Analysis (SC), Atlanta, GA, US, 2020, pp. 1127–1140, doi: 10.1109/SC41405.2020.00084.
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| arXiv
2020 | Conference Paper | LibreCat-ID: 21632
M. Meyer, T. Kenter, and C. Plessl, “Evaluating FPGA Accelerator Performance with a Parameterized OpenCL Adaptation of Selected Benchmarks of the HPCChallenge Benchmark Suite,” 2020, doi: 10.1109/h2rc51942.2020.00007.
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2019 | Conference Paper | LibreCat-ID: 15478
P. Gorlani, T. Kenter, and C. Plessl, “OpenCL Implementation of Cannon’s Matrix Multiplication Algorithm on Intel Stratix 10 FPGAs,” in Proceedings of the International Conference on Field-Programmable Technology (FPT), 2019.
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2018 | Conference Paper | LibreCat-ID: 1590
M. Lass, S. Mohr, H. Wiebeler, T. Kühne, and C. Plessl, “A Massively Parallel Algorithm for the Approximate Calculation of Inverse p-th Roots of Large Sparse Matrices,” presented at the Platform for Advanced Scientific Computing Conference (PASC), Basel, Switzerland, 2018, doi: 10.1145/3218176.3218231.
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| arXiv
2018 | Conference Paper | LibreCat-ID: 1204
H. Riebler, G. F. Vaz, T. Kenter, and C. Plessl, “Automated Code Acceleration Targeting Heterogeneous OpenCL Devices,” 2018, doi: 10.1145/3178487.3178534.
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2018 | Conference Paper | LibreCat-ID: 1588
T. Kenter et al., “OpenCL-based FPGA Design to Accelerate the Nodal Discontinuous Galerkin Method for Unstructured Meshes,” presented at the Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), 2018, doi: 10.1109/FCCM.2018.00037.
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2017 | Conference Paper | LibreCat-ID: 1592
T. Kenter, J. Förstner, and C. Plessl, “Flexible FPGA design for FDTD using OpenCL,” 2017, doi: 10.23919/FPL.2017.8056844.
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2016 | Conference Paper | LibreCat-ID: 24
T. Kenter and C. Plessl, “Microdisk Cavity FDTD Simulation on FPGA using OpenCL,” 2016.
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2016 | Conference Paper | LibreCat-ID: 171
T. Kenter, G. F. Vaz, H. Riebler, and C. Plessl, “Opportunities for deferring application partitioning and accelerator synthesis to runtime (extended abstract),” 2016.
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2016 | Conference Paper | LibreCat-ID: 168
A. Lösch, T. Beisel, T. Kenter, C. Plessl, and M. Platzner, “Performance-centric scheduling with task migration for a heterogeneous compute node in the data center,” in Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2016, pp. 912–917.
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2016 | Conference Paper | LibreCat-ID: 25
M. Lass, T. Kühne, and C. Plessl, “Using Approximate Computing in Scientific Codes,” 2016.
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2016 | Conference Paper | LibreCat-ID: 31
H. Riebler, G. F. Vaz, C. Plessl, E. M. G. Trainiti, G. C. Durelli, and C. Bolchini, “Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems,” 2016.
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2016 | Conference Paper | LibreCat-ID: 138
H. Riebler et al., “Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems,” in Proceedings of International Forum on Research and Technologies for Society and Industry (RTSI), 2016, pp. 1–5, doi: 10.1109/RTSI.2016.7740545.
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2015 | Conference Paper | LibreCat-ID: 303 |
M. Damschen and C. Plessl, “Easy-to-Use On-The-Fly Binary Program Acceleration on Many-Cores,” 2015.
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| arXiv
2015 | Conference Paper | LibreCat-ID: 1773
J. Schumacher et al., “Improving Packet Processing Performance in the ATLAS FELIX Project – Analysis and Optimization of a Memory-Bounded Algorithm,” 2015, doi: 10.1145/2675743.2771824.
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2015 | Conference Paper | LibreCat-ID: 238
M. Damschen, H. Riebler, G. F. Vaz, and C. Plessl, “Transparent offloading of computational hotspots from binary code to Xeon Phi,” in Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE), 2015, pp. 1078–1083, doi: 10.7873/DATE.2015.1124.
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2014 | Conference Paper | LibreCat-ID: 439
G. F. Vaz, H. Riebler, T. Kenter, and C. Plessl, “Deferring Accelerator Offloading Decisions to Application Runtime,” in Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2014, pp. 1–8, doi: 10.1109/ReConFig.2014.7032509.
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2014 | Conference Paper | LibreCat-ID: 406
T. Kenter, H. Schmitz, and C. Plessl, “Kernel-Centric Acceleration of High Accuracy Stereo-Matching,” in Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2014, pp. 1–8, doi: 10.1109/ReConFig.2014.7032535.
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2014 | Conference Paper | LibreCat-ID: 388
T. Kenter, G. F. Vaz, and C. Plessl, “Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer,” in Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC), 2014, vol. 8405, pp. 144–155, doi: 10.1007/978-3-319-05960-0_13.
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2014 | Conference Paper | LibreCat-ID: 377
H. Riebler, T. Kenter, C. Plessl, and C. Sorge, “Reconstructing AES Key Schedules from Decayed Memory with FPGAs,” in Proceedings of Field-Programmable Custom Computing Machines (FCCM), 2014, pp. 222–229, doi: 10.1109/FCCM.2014.67.
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2014 | Conference Paper | LibreCat-ID: 1778
G. C. Durelli et al., “Runtime Resource Management in Heterogeneous System Architectures: The SAVE Approach,” in Proc. Int. Symp. on Parallel and Distributed Processing with Applications (ISPA), 2014, pp. 142–149, doi: 10.1109/ISPA.2014.27.
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2014 | Conference Paper | LibreCat-ID: 1780
G. C. Durelli et al., “SAVE: Towards efficient resource management in heterogeneous system architectures,” 2014, doi: 10.1007/978-3-319-05960-0_38.
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2013 | Conference Paper | LibreCat-ID: 1793
D. Meister, A. Brinkmann, and T. Süß, “File Recipe Compression in Data Deduplication Systems,” in Proc. USENIX Conference on File and Storage Technologies (FAST), 2013, pp. 175–182.
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2013 | Conference Paper | LibreCat-ID: 528
H. Riebler, T. Kenter, C. Sorge, and C. Plessl, “FPGA-accelerated Key Search for Cold-Boot Attacks against AES,” in Proceedings of the International Conference on Field-Programmable Technology (FPT), 2013, pp. 386–389, doi: 10.1109/FPT.2013.6718394.
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2013 | Conference Paper | LibreCat-ID: 505
M. Happe, P. Kling, C. Plessl, M. Platzner, and F. Meyer auf der Heide, “On-The-Fly Computing: A Novel Paradigm for Individualized IT Services,” 2013, doi: 10.1109/ISORC.2013.6913232.
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2013 | Conference Paper | LibreCat-ID: 1787
T. Suess, A. Schoenrock, S. Meisner, and C. Plessl, “Parallel Macro Pipelining on the Intel SCC Many-Core Computer,” in Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW), 2013, pp. 64–73, doi: 10.1109/IPDPSW.2013.136.
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2012 | Conference Paper | LibreCat-ID: 2107
R. Grunzke et al., “A Data Driven Science Gateway for Computational Workflows,” in Proc. UNICORE Summit, 2012.
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2012 | Conference Paper | LibreCat-ID: 2178
S. Gesing et al., “A Science Gateway Getting Ready for Serving the International Molecular Simulation Community,” in Proceedings of Science, 2012, vol. PoS(EGICF12-EMITC2)050.
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2012 | Conference Paper | LibreCat-ID: 2106
B. Meyer, J. Schumacher, C. Plessl, and J. Förstner, “Convey Vector Personalities – FPGA Acceleration with an OpenMP-like Effort?,” in Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 2012, pp. 189–196, doi: 10.1109/FPL.2012.6339370.
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2012 | Conference Paper | LibreCat-ID: 615
M. Happe, H. Hangmann, A. Agne, and C. Plessl, “Eight Ways to put your FPGA on Fire – A Systematic Study of Heat Generators,” in Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), 2012, pp. 1–8, doi: 10.1109/ReConFig.2012.6416745.
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2012 | Conference Paper | LibreCat-ID: 612
C. Rüthing, M. Happe, A. Agne, and C. Plessl, “Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs,” in Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), 2012, pp. 559–562, doi: 10.1109/FPL.2012.6339370.
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2012 | Conference Paper | LibreCat-ID: 2100
S. Kasap and S. Redif, “FPGA implementation of a second-order convolutive blind signal separation algorithm,” in Int. Architecture and Engineering Symp. (ARCHENG), 2012.
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2012 | Conference Paper | LibreCat-ID: 2104
T. Schlemmer et al., “Generic User Management for Science Gateways via Virtual Organizations,” in Proc. EGI Technical Forum, 2012.
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2012 | Conference Paper | LibreCat-ID: 609
M. Happe, A. Agne, C. Plessl, and M. Platzner, “Hardware/Software Platform for Self-aware Compute Nodes,” in Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS), 2012, pp. 8–9.
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2012 | Conference Paper | LibreCat-ID: 2105
G. Congiu, M. Grawinkel, S. Narasimhamurthy, and A. Brinkmann, “One Phase Commit: A Low Overhead Atomic Commitment Protocol for Scalable Metadata Services,” in Proc. Workshop on Interfaces and Architectures for Scientific Data Storage (IASDS), 2012, pp. 16–24.
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2012 | Conference Paper | LibreCat-ID: 591
T. Kenter, C. Plessl, and H. Schmitz, “Pragma based parallelization - Trading hardware efficiency for ease of use?,” in Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2012, pp. 1–8, doi: 10.1109/ReConFig.2012.6416773.
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2012 | Conference Paper | LibreCat-ID: 2180
T. Beisel, T. Wiersema, C. Plessl, and A. Brinkmann, “Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux,” 2012.
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2012 | Conference Paper | LibreCat-ID: 2171
S. Gesing et al., “The MoSGrid Community From National to International Scale,” in Proc. EGI Community Forum, 2012.
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2012 | Conference Paper | LibreCat-ID: 567
P. Barrio, C. Carreras, R. Sierra, T. Kenter, and C. Plessl, “Turning control flow graphs into function calls: Code generation for heterogeneous architectures,” in Proceedings of the International Conference on High Performance Computing and Simulation (HPCS), 2012, pp. 559–565, doi: 10.1109/HPCSim.2012.6266973.
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2011 | Conference Paper | LibreCat-ID: 2199
S. Gesing et al., “A Science Gateway for Molecular Simulations,” in Proc. EGI User Forum, 2011, pp. 94–95.
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2011 | Conference Paper | LibreCat-ID: 2193
T. Beisel, T. Wiersema, C. Plessl, and A. Brinkmann, “Cooperative multitasking for heterogeneous accelerators in the Linux Completely Fair Scheduler,” in Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), 2011, pp. 223–226, doi: 10.1109/ASAP.2011.6043273.
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2011 | Conference Paper | LibreCat-ID: 2191
T. Kenter, C. Plessl, M. Platzner, and M. Kauschke, “Estimation and Partitioning for CPU-Accelerator Architectures,” in Intel European Research and Innovation Conference, 2011.
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2011 | Conference Paper | LibreCat-ID: 2195
M. Grawinkel, T. Schäfer, A. Brinkmann, J. Hagemeyer, and M. Porrmann, “Evaluation of Applied Intra-Disk Redundancy Schemes to Improve Single Disk Reliability,” in Proc. Int. Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS), 2011, pp. 297–306.
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2011 | Conference Paper | LibreCat-ID: 2197
S. Gesing et al., “Granular Security for a Science Gateway in Structural Bioinformatics,” in Proc. Int. Workshop on Scientific Gateways (IWSG), 2011.
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2011 | Conference Paper | LibreCat-ID: 2198
M. Grad and C. Plessl, “Just-in-time Instruction Set Extension – Feasibility and Limitations for an FPGA-based Reconfigurable ASIP Architecture,” in Proc. Reconfigurable Architectures Workshop (RAW), 2011, pp. 278–285, doi: 10.1109/IPDPS.2011.153.
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2011 | Conference Paper | LibreCat-ID: 656
M. Happe, A. Agne, and C. Plessl, “Measuring and Predicting Temperature Distributions on FPGAs at Run-Time,” in Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig), 2011, pp. 55–60, doi: 10.1109/ReConFig.2011.59.
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2011 | Conference Paper | LibreCat-ID: 2205
G. Birkenheuer et al., “MoSGrid: Progress of Workflow driven Chemical Simulations,” in Proc. of Grid Workflow Workshop (GWW), 2011, vol. 829.
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2011 | Conference Paper | LibreCat-ID: 2200
T. Kenter, M. Platzner, C. Plessl, and M. Kauschke, “Performance Estimation Framework for Automated Exploration of CPU-Accelerator Architectures,” in Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA), 2011, pp. 177–180, doi: 10.1145/1950413.1950448.
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2011 | Conference Paper | LibreCat-ID: 2194
B. Meyer, C. Plessl, and J. Förstner, “Transformation of scientific algorithms to parallel computing code: subdomain support in a MPI-multi-GPU backend,” in Symp. on Application Accelerators in High Performance Computing (SAAHPC), 2011, pp. 60–63, doi: 10.1109/SAAHPC.2011.12.
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2010 | Conference Paper | LibreCat-ID: 2224
M. Grad and C. Plessl, “An Open Source Circuit Library with Benchmarking Facilities,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2010, pp. 144–150.
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