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282 Publications


2011 | Conference Paper | LibreCat-ID: 26716
A Retargetable SysML-based Front-End for High-Level Synthesis
F. Mischkalla, D. He, W. Müller, in: Proceedings of 2nd Workshop on Model Based Engineering for Embedded Systems Design (M-BED), 2011.
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2011 | Conference Paper | LibreCat-ID: 26717
A SysML-based Framework with QEMU-SystemC Code Generation
D. He, F. Mischkalla, W. Müller, in: Proceedings of 1st International QEMU Users Forum, 2011.
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2011 | Conference Paper | LibreCat-ID: 26784
Synchronisation eines SystemC Restbus-Simulators mit einem Hardware-In-the-Loop FlexRay Netzwerk
G.B. Gnokam Defo, W. Müller, in: Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation von Schaltungen Und Systemen (MBMV), 2011.
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2011 | Conference Paper | LibreCat-ID: 26789
Native binary mutation analysis for embedded software and virtual prototypes in SystemC
C. Kuznik, W. Müller, in: Proceedings of the 17th IEEE Pacific Rim International Symposium on Dependable Computing, 2011.
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2011 | Book (Editor) | LibreCat-ID: 53580
Proceedings of the 1st International QEMU Users' Forum
W. Müller, F. Petrot, eds., Proceedings of the 1st International QEMU Users’ Forum, 2011.
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2011 | Conference Paper | LibreCat-ID: 37001
Virtual Prototyping software-intensiver mechatronischer Systeme - Eine Fallstudie
M. Becker, H. Zabel, W. Müller, A. Elfeky, in: Paderborn, 2011.
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2011 | Conference Paper | LibreCat-ID: 37005
A SystemC Based Library for Functional Coverage
C. Kuznik, W. Müller, in: 2011.
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2011 | Conference Paper | LibreCat-ID: 37006
A Reconfiguration Approach for Faul-Tolerant FlexRay Networks
K. Klobedanz, A. König, W. Müller, in: Proceedings of DATE’11, IEEE, Grenoble, France, 2011.
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2011 | Conference Paper | LibreCat-ID: 37002
HDL-Mutation Based Simulation Data Generation by Propagation Guided Search
T. Xie, W. Müller, F. Letombe, in: Proceedings of Euromicro DSD 2011, IEEE, Oulu, Finnland, 2011.
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2011 | Conference Paper | LibreCat-ID: 36999
Virtual Prototyping software-intensiver mechatronischer Systeme - Eine Fallstudie
M. Becker, H. Zabel, W. Müller, A. Elfeky, in: Paderborn, 2011.
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2010 | Book (Editor) | LibreCat-ID: 53582
Proceedings of the 1st Workshop on Model Based Engineering for Embedded Systems Design
S. Gerard, W. Müller, L. Rioux, B. Selic, eds., Proceedings of the 1st Workshop on Model Based Engineering for Embedded Systems Design, Dresden, Germany, 2010.
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2010 | Conference Paper | LibreCat-ID: 37007
Closing the Gap between UML-based Modeling and Simulation of Combined HW/SW Systems
F. Mischkalla, D. He, W. Müller, in: Proceedings of DATE’10, IEEE, Dresden, 2010.
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2010 | Conference Paper | LibreCat-ID: 37009
Assertion-Based Verification of RTOS Properties
M.F.S. Oliveira, H. Zabel, W. Müller, in: Proceedings of DATE’10, IEEE, Dresden, 2010.
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2010 | Conference Paper | LibreCat-ID: 37011
Timing Modeling and Analysis for AUTOSAR-Based Software Development - A Case Study
K. Klobedanz, C. Kuznik, A. Thuy, W. Müller, in: Proceedings of DATE’10, Dresden, IEEE, Dresden, 2010.
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2010 | Conference Paper | LibreCat-ID: 37037
A Systematic Approach to Combined HW/SW System Test
A. Krupp, W. Müller, in: Proceedings of DATE’10, IEEE, Dresden, 2010.
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2010 | Conference Paper | LibreCat-ID: 37040
RTOS-Aware Refinement for TLM2.0-based HW/SW Design
M. Becker, G. Di Guglielmo, F. Fummi, W. Müller, G. Pravadelli, T. Xie, in: Proceedings of DATE’10, IEEE, Dresden, 2010.
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2010 | Conference Paper | LibreCat-ID: 37046
A Mixed Level Simulation Environment for Stepwise RTOS Software Refinement
M. Becker, H. Zabel, W. Müller, in: L. Kleinjohann, B. Kleinjohann (Eds.), Springer Verlag, Dordrecht, 2010.
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2010 | Conference Paper | LibreCat-ID: 37044
Task Migration for Fault-Tolerant FlexRay Networks
K. Klobedanz, G.B. Defo, H. Zabel, W. Müller, Y. Zhi, in: L. Kleinjohann, B. Kleinjohann (Eds.), Springer Verlag, Dordrecht, 2010.
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2010 | Conference Paper | LibreCat-ID: 37042
A UML Profile for SysML-Based Comodeling for Embedded Systems Simulation and Synthesis
F. Mischkalla, W. Müller, D. He, in: Proceedings of the M-BED Workshop, Dresden, 2010.
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2010 | Conference Paper | LibreCat-ID: 37043
Eine strukturierte Methode zur Generierung von SystemVerilog-Testumgebungen aus textuellen Anforderungsbeschreibungen
A. Bol, W. Müller, A. Krupp, in: Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation von Schaltungen Und Systemen (MBMV), Dresden, 2010.
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