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264 Publications


2017 | Conference Paper | LibreCat-ID: 24223
SPICE-Level Fault Injection with Likelihood Weighted Random Sampling - A Case Study
L. Wu, S. Abughannam, W. Müller, C. Scheytt, W. Ecker, in: 2nd Workshop on Resiliency in Embedded Electronic Systems (REES), Lausanne, Switzerland, 2017, p. 68.
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2017 | Conference Paper | LibreCat-ID: 24224
ANALISA - A Tool for Static Instruction Set Analysis
P. Adelt, B. Koppelmann, W. Müller, B. Kleinjohann, C. Scheytt, in: Design Automation and Testing in Europe (DATE), University Booth Interactive Presentation, Lausanne, CH, 2017.
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2017 | Conference Paper | LibreCat-ID: 24225
An Automatic Injection Framework for Safety Assessements of Embedded Software Binaries
P. Adelt, B. Koppelmann, W. Müller, B. Kleinjohann, C. Scheytt, in: 2nd Workshop on Resiliency in Embedded Electronic Systems (REES) , Lausanne, Switzerland, 2017, p. 44.
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2016 | Conference Paper | LibreCat-ID: 24264
Fast Dynamic Fault Injection for Virtual Microcontroller Platforms
P. Adelt, B. Koppelmann, W. Müller, M. Becker, B. Kleinjohann, C. Scheytt, in: Proceedings of the IEEE/IFIP International Conference on VLSI (VLSI-SOC), Tallin, Estonia, 2016.
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2016 | Conference Paper | LibreCat-ID: 24263
Fault Injection and Mixed-Level Simulation for Analog Circuits - A Case Study
S. Abughannam, L. Wu, W. Müller, C. Scheytt, W. Ecker, C. Novello, in: Analog 2016 - VDE, 2016.
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2015 | Conference Paper | LibreCat-ID: 24289
On the Correlation of HW Faults and SW Errors
W. Müller, L. Wu, C. Scheytt, M. Becker, S. Schoenberg, in: D. Mueller-Gritschneder, W. Müller, S. Mitra (Eds.), Proceedings of the 1st International Workshop on Resiliency in Embedded Electronic Systems (REES 2014), Amsterdam, Netherland, 2015.
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2015 | Book (Editor) | LibreCat-ID: 53590
Proceedings of the 1st International Workshop on Resiliency in Embedded Electronic Systems
D. Müller-Gridschneder, W. Müller, S. Mitra, eds., Proceedings of the 1st International Workshop on Resiliency in Embedded Electronic Systems, Amsterdam, Netherlands, 2015.
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2014 | Conference Paper | LibreCat-ID: 25145
Virtual Platforms for Model-Based Design of Dependable Cyber-Physical System Software
M. Becker, C. Kuznik, W. Müller, in: 17th Euromicro Conference on Digital Systems Design (DSD), 2014.
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2014 | Conference Paper | LibreCat-ID: 25155
Fault Effect Modeling in a Heterogeneous SystemC Virtual Platform Framework for Cyber-Physical Systems
M. Becker, C. Kuznik, W. Müller, in: ACM/IEEE 5th International Conference on Cyber-Physical Systems, 2014.
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2014 | Conference Paper | LibreCat-ID: 25161
Portierung der TriCore-Architektur auf QEMU
B. Koppelmann, M. Becker, W. Müller, in: 17. Workshop Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation von Schaltungen Und Systemen (MBMV 2014) , 2014.
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2014 | Conference Paper | LibreCat-ID: 24305
Architectural Low-Power Design Using Transaction-Based System Modeling and Simulation
F. Mischkalla, W. Müller, in: Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV), IEEE, Greece, 2014.
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2014 | Journal Article | LibreCat-ID: 24302
Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU
B. Koppelmann, B. Messidat, M. Becker, C. Kuznik, W. Müller, C. Scheytt, Design and Verification Conference (DVCON EUROPE) (2014).
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2014 | Journal Article | LibreCat-ID: 24309
Verific-MM: Systematized Verification Metrics Generation with UCIS for Improved Automation on Verification Closure
C. Kuznik, W. Müller, Design, Automation and Test in Europe DATE, University Booth, Dresden (2014).
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2014 | Conference Paper | LibreCat-ID: 24311
Safety Evaluation of Automotive Electronics Using Virtual Prototypes: State of the Art and Research Challenges
J.-H. Oetjens, M. Becker, C. Kuznik, W. Müller, N. Bannow, O. Brinkmann, A. Burger, M. Chaari, S. Chakraborty, R. Drechsler, W. Ecker, K. Grüttner, T. Kruse, H.M. Le, M. Mauderer, D. Mueller-Gritschneider, F. Poppen, H. Post, Se. Reiter, W. Rosenstiel, S. Roth, U. Schlichtmann, A. Von Schwerin, B.A. Tabacaru, A. Viehl, in: Design Automation Conference (DAC), 2014.
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2014 | Conference Paper | LibreCat-ID: 25120
Architectural Low-Power Design Using Transaction-Based System Simulation
F. Mischkalla, W. Müller, in: Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV), IEEE, 2014.
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2014 | Conference Paper | LibreCat-ID: 25146
Source code annotated memory leak detection for soft real time embedded systems with resource constraints
M. tech. M.M. Joy, W. Müller, F.-J. Rammig, in: 12th IEEE International Conference on Embedded Computing, 2014.
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2014 | Conference Paper | LibreCat-ID: 25144
Advanced SoC Virtual Prototyping for System-Level Power Planning and Validation
F. Mischkalla, W. Müller, in: PATMOS 2014, Palma de Mallorca, Spain, 2014.
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2014 | Conference Paper | LibreCat-ID: 36918
Fault Effect Modeling in a Heterogeneous SystemC Based Virtual Platform Framework for Cyber Physical Systems
M. Becker, C. Kuznik, W. Müller, in: IEEE, Berlin, 2014.
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2014 | Conference Paper | LibreCat-ID: 36917
An Assisted Single Source Verification Metric Model Code Generation Methodology
C. Kuznik, W. Müller, G.B. Defo, in: San Francisco, USA, 2014.
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2014 | Conference Paper | LibreCat-ID: 25166
Modellierung effizienter Stresstest-Umgebungen für virtuelle Prototypen mit SVM
C. Kuznik, W. Müller, in: 26. ITG / GI / GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, 2014.
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