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237 Publications


2012 | Conference Paper | LibreCat-ID: 24546
Sedighi B, Ostrovskyy P, Scheytt C, Stille KSC, Böcker J. Low-power 20-Gb/s SiGe BiCMOS driver with 2.5 V output swing. In: Microwave Symposium Digest (MTT), 2012 IEEE MTT-S International. ; 2012:1-3. doi:10.1109/MWSYM.2012.6259502
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2012 | Conference Paper | LibreCat-ID: 24423
Scheytt C, Sun Y. 122 GHz FMCW Radar Transceiver and Components in 0.13µm SiGe BiCMOS Technology. In: System, MMIC and Package Design for Low-Cost Radar Sensor. ; 2012.
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2012 | Conference Paper | LibreCat-ID: 24421
Koelnberger A, Herzel F, Heyer H-V, et al. Spurs and Phase Noise for an integrated 8-12 GHZ Fractional-N PLL Synthesizer in SiGe BiCMOS  . In: Simulations and Measurements of In-Band. ; 2012.
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2012 | Patent | LibreCat-ID: 24400
Wang R, Sun Y, Kaynak M, Scheytt JC. Chip-Antenne, Elektronisches Bauelement und Herstellungsverfahren. Published online 2012.
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2012 | Book (Editor) | LibreCat-ID: 53593
Müller W, Ecker W, eds. Proceedings of the 1st Workshop on Metamodelling and Code Generation for Embedded Systems - MeCoEs .; 2012.
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2011 | Book (Editor) | LibreCat-ID: 53580
Müller W, Petrot F, eds. Proceedings of the 1st International QEMU Users’ Forum.; 2011.
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2010 | Journal Article | LibreCat-ID: 45774
Osmany SA, Herzel F, Scheytt JC. An integrated 0.6–4.6 GHz, 5–7 GHz, 10–14 GHz, and 20–28 GHz frequency synthesizer for software-defined radio applications. IEEE Journal of Solid-State Circuits. 2010;45(9):1657-1668. doi:10.1109/JSSC.2010.2051476
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2010 | Journal Article | LibreCat-ID: 45772
Herzel F, Osmany SA, Scheytt JC. Analytical Phase-Noise Modeling and Charge Pump Optimization for Fractional-$N$ PLLs. IEEE Transactions on Circuits and Systems I: Regular Papers. 2010;57(8):1914-1924.
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2010 | Book (Editor) | LibreCat-ID: 53582
Gerard S, Müller W, Rioux L, Selic B, eds. Proceedings of the 1st Workshop on Model Based Engineering for Embedded Systems Design.; 2010.
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2010 | Book (Editor) | LibreCat-ID: 53581
De Micheli G, Müller W, eds. Proceedings of 13th Design Automation and Test in Europe Conference & Exhibition  (DATE). IEEE Press; 2010.
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2009 | Book (Editor) | LibreCat-ID: 40119
Ecker W, Müller W, Dömer R, eds. Hardware-Dependent Software. Springer Netherlands; 2009. doi:10.1007/978-1-4020-9436-1
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2008 | Book (Editor) | LibreCat-ID: 53583
Müller W, Wolfe J, eds. Proceedings of the 5th International DAC Workshop of UML for SoC Design.; 2008.
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2008 | Book (Editor) | LibreCat-ID: 53594
Wolfe J, Müller W, eds. Proceedings of the 4th DAC Workshop on UML for SOC Design .; 2008.
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2007 | Book (Editor) | LibreCat-ID: 53584
Vanderperren Y, ed. Proceedings of the 1st International Workshop of UML for SoC and Embedded Systems Design.; 2007.
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2006 | Conference Paper | LibreCat-ID: 19870
Brinkmann A, Effert S, Heidebuer M, Vodisek M. Realizing Multilevel Snapshots in Dynamically Changing Virtualized Storage Environments. In: 5th International Conference on Networking (ICN). ; 2006. doi:10.1109/icniconsmcl.2006.182
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2005 | Conference Paper | LibreCat-ID: 19871
Brinkmann A, Effert S, Heidebuer M, Vodisek M. Distributed MD. In: In Proceedings of the International Workshop on Storage Network Architecture and Parallel I/Os. ; 2005:81-88.
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2005 | Conference Paper | LibreCat-ID: 19872
Brinkmann A, Effert S, Heidebuer M, Vodisek M, Baars H. An integrated Architecture for Business Intelligence support from Application down to Storage. In: In Proceedings of the International Workshop on Storage Network Architecture and Parallel I/Os. ; 2005:1-8.
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2005 | Conference Paper | LibreCat-ID: 19912
Loeser C, Schomaker G, Brinkmann A, Vodisek M, Heidebuer M. Content Distribution in Heterogenous Video-on-Demand P2P Networks with ARIMA Forecasts. In: Proceedings of the 4th International Conference on Networking. Vol 3421. Berlin, Heidelberg; 2005:800-810. doi:10.1007/978-3-540-31957-3_90
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2005 | Book (Editor) | LibreCat-ID: 53592
Lavagno L, Müller W, eds. Proceedings of the 2nd International DAC Workshop on UML for SoC Design.; 2005.
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2004 | Book (Editor) | LibreCat-ID: 53585
Müller W, Martin G, eds. Proceedings of the 1st International DAC Workshop of UML for SoC Design.; 2004.
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