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5774 Publications
2010 | Conference Paper | LibreCat-ID: 13593
Dembczynski K, Waegeman W, Cheng W, Hüllermeier E. Regret analysis for performance metrics in multi-label classification: The case of Hamming and subset zero-one loss. In: In Proceedings ECML/PKDD-2010, European Conference on Machine Learning and Principles and Practice of Knowledge Discovery in Databases, ,Bareclona, Spain. ; 2010.
LibreCat
2010 | Conference Paper | LibreCat-ID: 13594
Cheng W, Rademaker M, De Beats B, Hüllermeier E. Predicting partial orders: Ranking with abstention. In: In Proceedings ECML/PKDD-2010, European Conference on Machine Learning and Principles and Practice of Knowledge Discovery in Databases, ,Bareclona, Spain. ; 2010.
LibreCat
2010 | Conference Paper | LibreCat-ID: 13597
Hüllermeier E. Uncertainty in clustering and classification . In: In Proceedings SUM 2010, International Conference on Scalable Uncertainty Management . Vol 6379. Springer; 2010:16-19.
LibreCat
2010 | Conference Paper | LibreCat-ID: 13640
Giefers H, Platzner M. A Triple Hybrid Interconnect for Many-Cores: Reconfigurable Mesh, NoC and Barrier. In: Proceedings of the 20th International Conference on Field Programmable Logic and Applications (FPL). IEEE; 2010.
LibreCat
2010 | Conference Paper | LibreCat-ID: 13641
Schäfer W, Birattari M, Blömer J, et al. Engineering Self-Coordinating Software Intensive Systems. In: Proceedings of the Foundations of Software Engineering (FSE) and NITR & D/SPD Working Conference on the Future of Software Engineering Research (FoSER). ; 2010:321-324.
LibreCat
2010 | Conference Paper | LibreCat-ID: 13642
Giefers H, Platzner M. A Self-Reconfigurable Lightweight Interconnect for Scalable Processor Fabrics. In: Proceedings of the 10th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2010.
LibreCat
2010 | Conference Paper | LibreCat-ID: 37007
Mischkalla F, He D, Müller W. Closing the Gap between UML-based Modeling and Simulation of Combined HW/SW Systems. In: Proceedings of DATE’10. IEEE; 2010. doi:10.1109/DATE.2010.5456990
LibreCat
| DOI
2010 | Conference Paper | LibreCat-ID: 37009
Oliveira MFS, Zabel H, Müller W. Assertion-Based Verification of RTOS Properties. In: Proceedings of DATE’10. IEEE; 2010. doi:10.1109/DATE.2010.5457130
LibreCat
| DOI
2010 | Conference Paper | LibreCat-ID: 37011
Klobedanz K, Kuznik C, Thuy A, Müller W. Timing Modeling and Analysis for AUTOSAR-Based Software Development - A Case Study. In: Proceedings of DATE’10, Dresden. IEEE; 2010. doi:10.1109/DATE.2010.5457125
LibreCat
| DOI
2010 | Conference Paper | LibreCat-ID: 37037
Krupp A, Müller W. A Systematic Approach to Combined HW/SW System Test. In: Proceedings of DATE’10. IEEE; 2010. doi:10.1109/DATE.2010.5457186
LibreCat
| DOI
2010 | Conference Paper | LibreCat-ID: 37040
Becker M, Di Guglielmo G, Fummi F, Müller W, Pravadelli G, Xie T. RTOS-Aware Refinement for TLM2.0-based HW/SW Design. In: Proceedings of DATE’10. IEEE; 2010. doi:10.1109/DATE.2010.5456965
LibreCat
| DOI
2010 | Conference Paper | LibreCat-ID: 37046
Becker M, Zabel H, Müller W. A Mixed Level Simulation Environment for Stepwise RTOS Software Refinement. In: Kleinjohann L, Kleinjohann B, eds. Springer Verlag; 2010. doi:10.1007/978-3-642-15234-4_15
LibreCat
| DOI
2010 | Conference Paper | LibreCat-ID: 37044
Klobedanz K, Defo GB, Zabel H, Müller W, Zhi Y. Task Migration for Fault-Tolerant FlexRay Networks. In: Kleinjohann L, Kleinjohann B, eds. Springer Verlag; 2010. doi:10.1007/978-3-642-15234-4_7
LibreCat
| DOI
2010 | Conference Paper | LibreCat-ID: 37042
Mischkalla F, Müller W, He D. A UML Profile for SysML-Based Comodeling for Embedded Systems Simulation and Synthesis. In: Proceedings of the M-BED Workshop. ; 2010.
LibreCat
2010 | Conference Paper | LibreCat-ID: 37043
Bol A, Müller W, Krupp A. Eine strukturierte Methode zur Generierung von SystemVerilog-Testumgebungen aus textuellen Anforderungsbeschreibungen. In: Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation von Schaltungen Und Systemen (MBMV). ; 2010.
LibreCat
2010 | Conference Paper | LibreCat-ID: 37050
Müller W, He D, Mischkalla F, et al. The SATURN Approach to SysML-based HW/SW Codesign. In: Proceedings of the IEEE Computer Society Annual Symposium on VLSI. Lecture Notes in Electrical Engineering. ; 2010. doi:10.1007/978-94-007-1488-5_9
LibreCat
| DOI
2010 | Conference Paper | LibreCat-ID: 37048
Müller W, Bol A, Krupp A, Lundkvist O. Generation of Executable Testbenches from Natural Language Requirement Specifications for Embedded Real-Time Systems. In: Kleinjohann L, Kleinjohann B, eds. Springer Verlag; 2010. doi:10.1007/978-3-642-15234-4_9
LibreCat
| DOI
2010 | Conference Paper | LibreCat-ID: 37049
Xie T, Letombe F, Müller W. Mutation-Analysis Directed Constrained Random Verification. In: Kleinjohann L, Kleinjohann B, eds. Springer Verlag; 2010.
LibreCat
2010 | Conference Paper | LibreCat-ID: 37051
Xie T, Defo GB, Müller W. An Eclipse-based Framework for the IP-XACT-enabled Assembly of Mixed-Level IPs. In: ; 2010.
LibreCat
2010 | Conference Paper | LibreCat-ID: 37057
Defo GB, Müller W, Kuznik C. Verification of a CAN Bus Model in SystemC with Functional Coverage. In: Proceedings of SIES 2010. IEEE; 2010. doi:10.1109/SIES.2010.5551379
LibreCat
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