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375 Publications


2021 | Conference Paper | LibreCat-ID: 20681
Malicious Routing: Circumventing Bitstream-level Verification for FPGAs
Q.A. Ahmed, T. Wiersema, M. Platzner, in: 2021 Design, Automation and Test in Europe Conference (DATE), Alpexpo | Grenoble, France, n.d.
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2020 | Journal Article | LibreCat-ID: 15836
Self-aware Cyber-Physical Systems
K. Bellman, N. Dutt, L. Esterle, A. Herkersdorf, A. Jantsch, C. Landauer, P. R. Lewis, M. Platzner, N. TaheriNejad, K. Tammemäe, ACM Transactions on Cyber-Physical Systems Accepted for Publication (2020) 1–24.
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2020 | Journal Article | LibreCat-ID: 17092
Dynamic Reliability Management for FPGA-Based Systems
J. Anwer, S. Meisner, M. Platzner, International Journal of Reconfigurable Computing (2020) 1–19.
LibreCat | DOI
 

2020 | Journal Article | LibreCat-ID: 17369
Evolution of Application-Specific Cache Mappings
N. Ho, P. Kaufmann, M. Platzner, International Journal of Hybrid Intelligent Systems (2020).
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2020 | Journal Article | LibreCat-ID: 17358
Proof-carrying Approximate Circuits
L.M. Witschen, T. Wiersema, M. Platzner, IEEE Transactions On Very Large Scale Integration Systems 28 (2020) 2084–2088.
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2020 | Preprint | LibreCat-ID: 20748
Search Space Characterization for AxC Synthesis
L.M. Witschen, T. Wiersema, M. Platzner, Fifth Workshop on Approximate Computing (AxC 2020) (n.d.).
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2020 | Conference Paper | LibreCat-ID: 20750
ReconROS: Flexible Hardware Acceleration for ROS2 Applications
C. Lienen, M. Platzner, B. Rinner, in: 2020.
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2020 | Bachelorsthesis | LibreCat-ID: 20820
Implementing Machine Learning Functions as PYNQ FPGA Overlays
S. Thiele, Implementing Machine Learning Functions as PYNQ FPGA Overlays, 2020.
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2020 | Conference Paper | LibreCat-ID: 3583
Optimal and Greedy Heuristic Approaches for Scheduling and Mapping of Hardware Tasks to Reconfigurable Computing Devices
Z. Guetttatfi, P. Kaufmann, M. Platzner, in: Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC), 2020.
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2020 | Conference Paper | LibreCat-ID: 17063
An Adaption Mechanism for the Error Threshold of XCSF
T. Hansmeier, P. Kaufmann, M. Platzner, in: GECCO ’20: Proceedings of the Genetic and Evolutionary Computation Conference Companion, Association for Computing Machinery (ACM), New York, NY, United States, 2020, pp. 1756–1764.
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2020 | Conference Paper | LibreCat-ID: 16363
Enabling XCSF to Cope with Dynamic Environments via an Adaptive Error Threshold
T. Hansmeier, P. Kaufmann, M. Platzner, in: GECCO ’20: Proceedings of the Genetic and Evolutionary Computation Conference Companion, Association for Computing Machinery (ACM), New York, NY, United States, n.d., pp. 125–126.
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2020 | Mastersthesis | LibreCat-ID: 20821
Extension and Evaluation of Python-based High-Level Synthesis Tool Flows
V. Jaganath, Extension and Evaluation of Python-Based High-Level Synthesis Tool Flows, 2020.
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2020 | Conference Paper | LibreCat-ID: 20838
MigHEFT: DAG-based Scheduling of Migratable Tasks on Heterogeneous Compute Nodes
A. Loesch, M. Platzner, in: 2020 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), 2020.
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2020 | Conference Paper | LibreCat-ID: 16213
A Hybrid Synthesis Methodology for Approximate Circuits
M. Awais, H. Ghasemzadeh Mohammadi, M. Platzner, in: Proceedings of the 30th ACM Great Lakes Symposium on VLSI (GLSVLSI) 2020, ACM, 2020, pp. 421–426.
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2019 | Preprint | LibreCat-ID: 16853
Jump Search: A Fast Technique for the Synthesis of Approximate Circuits
L.M. Witschen, H. Ghasemzadeh Mohammadi, M. Artmann, M. Platzner, Fourth Workshop on Approximate Computing (AxC 2019) (n.d.).
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2019 | Journal Article | LibreCat-ID: 3585
CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation
L.M. Witschen, T. Wiersema, H. Ghasemzadeh Mohammadi, M. Awais, M. Platzner, Microelectronics Reliability 99 (2019) 277–290.
LibreCat | DOI
 

2019 | Conference Paper | LibreCat-ID: 9913
Proof-Carrying Hardware Versus the Stealthy Malicious LUT Hardware Trojan
Q.A. Ahmed, T. Wiersema, M. Platzner, in: C. Hochberger, B. Nelson, A. Koch, R. Woods, P. Diniz (Eds.), Applied Reconfigurable Computing, Springer International Publishing, Cham, 2019, pp. 127–136.
LibreCat | Files available | DOI
 

2019 | Mastersthesis | LibreCat-ID: 15874
Implementing a Real-time System on a Platform FPGA operated with ReconOS
C. Lienen, Implementing a Real-Time System on a Platform FPGA Operated with ReconOS, Universität Paderborn, 2019.
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2019 | Mastersthesis | LibreCat-ID: 15920
A Bitstream-Level Proof-Carrying Hardware Technique for Information Flow Tracking
M. Keerthipati, A Bitstream-Level Proof-Carrying Hardware Technique for Information Flow Tracking, Universität Paderborn, 2019.
LibreCat
 

2019 | Conference Paper | LibreCat-ID: 10577
Jump Search: A Fast Technique for the Synthesis of Approximate Circuits
L.M. Witschen, H. Ghasemzadeh Mohammadi, M. Artmann, M. Platzner, in: Proceedings of the 2019 on Great Lakes Symposium on VLSI  - GLSVLSI ’19, ACM, New York, NY, USA, 2019.
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