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410 Publications


2022 | Preprint | LibreCat-ID: 29541 LibreCat | Download (ext.)
 

2022 | Journal Article | LibreCat-ID: 33990
RadioML Meets FINN: Enabling Future RF Applications With FPGA Streaming Architectures
F. Jentzsch, Y. Umuroglu, A. Pappalardo, M. Blott, M. Platzner, IEEE Micro 42 (2022) 125–133.
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2022 | Conference Paper | LibreCat-ID: 34005 LibreCat
 

2022 | Conference Paper | LibreCat-ID: 34007 LibreCat
 

2022 | Conference Paper | LibreCat-ID: 29945
Search Space Characterization for Approximate Logic Synthesis
L.M. Witschen, T. Wiersema, L.D. Reuter, M. Platzner, in: 2022 59th ACM/IEEE Design Automation Conference (DAC), n.d.
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2022 | Conference Paper | LibreCat-ID: 29865
MUSCAT: MUS-based Circuit Approximation Technique
L.M. Witschen, T. Wiersema, M. Artmann, M. Platzner, in: Design, Automation and Test in Europe (DATE), n.d.
LibreCat
 

2022 | Conference Paper | LibreCat-ID: 30971
Integrating Safety Guarantees into the Learning Classifier System XCS
T. Hansmeier, M. Platzner, in: Applications of Evolutionary Computation, EvoApplications 2022, Proceedings, Springer International Publishing, 2022, pp. 386–401.
LibreCat | DOI
 

2022 | Conference Paper | LibreCat-ID: 32342
On the Detection and Circumvention of Bitstream-Level Trojans in FPGAs
Q.A. Ahmed, M. Platzner, in: IEEE Computer Society Annual Symposium on VLSI (ISVLSI,2022), Pafos, Cyprus, 2022.
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2022 | Dissertation | LibreCat-ID: 34041
Frameworks and Methodologies for Search-based Approximate Logic Synthesis
L.M. Witschen, Frameworks and Methodologies for Search-Based Approximate Logic Synthesis, 2022.
LibreCat
 

2022 | Conference Paper | LibreCat-ID: 32855
ReconOS64: A Hardware Operating System for Modern Platform FPGAs with 64-Bit Support
L. Clausing, M. Platzner, in: 2022 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), IEEE, 2022, pp. 120–127.
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2022 | Dissertation | LibreCat-ID: 29769 | OA
Hardware Trojans in Reconfigurable Computing
Q.A. Ahmed, Hardware Trojans in Reconfigurable Computing, Paderborn University, Paderborn, Germany, Paderborn, 2022.
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2022 | Conference Paper | LibreCat-ID: 33253
XCS on Embedded Systems: An Analysis of Execution Profiles and Accelerated Classifier Deletion
T. Hansmeier, M. Brede, M. Platzner, in: GECCO ’22: Proceedings of the Genetic and Evolutionary Computation Conference Companion, Association for Computing Machinery (ACM), New York, NY, United States, 2022, pp. 2071–2079.
LibreCat | DOI
 

2021 | Dissertation | LibreCat-ID: 26746 | OA
Guaranteeing Properties of Reconfigurable Hardware Circuits with Proof-Carrying Hardware
T. Wiersema, Guaranteeing Properties of Reconfigurable Hardware Circuits with Proof-Carrying Hardware, Paderborn University, Paderborn, 2021.
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2021 | Conference Paper | LibreCat-ID: 29138
Hardware Trojans in Reconfigurable Computing
Q.A. Ahmed, in: 2021 IFIP/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC), 2021.
LibreCat | DOI
 

2021 | Journal Article | LibreCat-ID: 29150
Design of Distributed Reconfigurable Robotics Systems with ReconROS
C. Lienen, M. Platzner, ACM Transactions on Reconfigurable Technology and Systems (2021) 1–20.
LibreCat | DOI
 

2021 | Mastersthesis | LibreCat-ID: 29151
A Comparison of Machine Learning Techniques for the On-line Characterization of Tasks Executed on Heterogeneous Compute Nodes
C. Kashikar, A Comparison of Machine Learning Techniques for the On-Line Characterization of Tasks Executed on Heterogeneous Compute Nodes, Paderborn University, Paderborn, 2021.
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2021 | Journal Article | LibreCat-ID: 27841
Software/Hardware Co-Verification for Custom Instruction Set Processors
M.-C. Jakobs, F. Pauck, M. Platzner, H. Wehrheim, T. Wiersema, IEEE Access (n.d.).
LibreCat | DOI
 

2021 | Conference Paper | LibreCat-ID: 21610
LDAX: A Learning-based Fast Design Space Exploration Framework for Approximate Circuit Synthesis
M. Awais, H. Ghasemzadeh Mohammadi, M. Platzner, in: Proceedings of the ACM Great Lakes Symposium on VLSI (GLSVLSI) 2021, ACM, 2021, pp. 27–32.
LibreCat | DOI
 

2021 | Conference Paper | LibreCat-ID: 20681
Malicious Routing: Circumventing Bitstream-level Verification for FPGAs
Q.A. Ahmed, T. Wiersema, M. Platzner, in: 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2021 Design, Automation and Test in Europe Conference (DATE), Alpexpo | Grenoble, France, 2021.
LibreCat | DOI
 

2021 | Bachelorsthesis | LibreCat-ID: 22216
Decomposition of Arithmetic Components for the Approximate Circuit Synthesis with EvoApproxLib
J.W. Rehnen, Decomposition of Arithmetic Components for the Approximate Circuit Synthesis with EvoApproxLib, 2021.
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