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451 Publications


2010 | Bachelorsthesis | LibreCat-ID: 10657
Parallelization of the UCT Algorithm on HPC-Clusters
T. Graf, Parallelization of the UCT Algorithm on HPC-Clusters, Paderborn University, 2010.
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2010 | Conference Paper | LibreCat-ID: 10683
Fluctuating EMG Signals: Investigating Long-term Effects of Pattern Matching Algorithms
P. Kaufmann, K. Englehart, M. Platzner, in: International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC), IEEE, 2010, pp. 6357–6360.
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2010 | Conference Paper | LibreCat-ID: 10686
A Novel Hybrid Evolutionary Strategy and its Periodization with Multi-objective Genetic Optimizers
P. Kaufmann, T. Knieper, M. Platzner, in: IEEE World Congress on Computational Intelligence (WCCI), Congress on Evolutionary Computation (CEC), IEEE, 2010, pp. 541–548.
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2010 | Journal Article | LibreCat-ID: 10694
Selected papers from the 18th International Conference on Field Programmable Logic and Applications, FPL 2008 (editorial)
U. Kebschull, M. Platzner, J. Teich, IET Computers Digital Techniques 4 (2010) 157–158.
LibreCat | DOI
 

2010 | Mastersthesis | LibreCat-ID: 10697
Hybridization of Global Multi-Objective and Local Search Techniques
T. Knieper, Hybridization of Global Multi-Objective and Local Search Techniques, Paderborn University, 2010.
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2010 | Conference Paper | LibreCat-ID: 10699
Coping with Resource Fluctuations: The Run-time Reconfigurable Functional Unit Row Classifier Architecture
T. Knieper, P. Kaufmann, K. Glette, M. Platzner, J. Torresen, in: IEEE Intl. Conf. on Evolvable Systems (ICES), Springer, 2010, pp. 250–261.
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2010 | Book Chapter | LibreCat-ID: 10704
ReconOS: An Operating System for Dynamically Reconfigurable Hardware
E. Lübbers, M. Platzner, in: M. Platzner, J. Teich, N. Wehn (Eds.), Dynamically Reconfigurable Systems: Architectures, Design Methods and Applications, Springer-Verlag GmbH, 2010, pp. 269–290.
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2010 | Mastersthesis | LibreCat-ID: 10710
FPGA/CPU Multicore-Plattform für ReconOS/eCos
R. Meiche, FPGA/CPU Multicore-Plattform Für ReconOS/ECos, Paderborn University, 2010.
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2010 | Mastersthesis | LibreCat-ID: 10717
Transparente Hardwarebeschleunigung durch Shared Library Interposing
M. Niekamp, Transparente Hardwarebeschleunigung Durch Shared Library Interposing, Paderborn University, 2010.
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2010 | Mastersthesis | LibreCat-ID: 10731
A Token-Ring Network-On-Chip for Message Passing in ReconOS
B. Runde, A Token-Ring Network-On-Chip for Message Passing in ReconOS, Paderborn University, 2010.
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2010 | Mastersthesis | LibreCat-ID: 10752
Scheduling Support for Heterogeneous Hardware Accelerators under Linux
T. Wiersema, Scheduling Support for Heterogeneous Hardware Accelerators under Linux, Paderborn University, 2010.
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2010 | Book (Editor) | LibreCat-ID: 10763
Dynamically Reconfigurable Systems: Architectures, Design Methods and Applications
M. Platzner, J. Teich, N. Wehn, eds., Dynamically Reconfigurable Systems: Architectures, Design Methods and Applications, Springer-Verlag GmbH, 2010.
LibreCat | DOI
 

2010 | Conference Paper | LibreCat-ID: 10776
Sub-threshold charge recovery circuits
M. Khatir, H. Ghasemzadeh Mohammadi, A. Ejlali, in: Computer Design (ICCD), 2010 IEEE International Conference On, IEEE, 2010, pp. 138–144.
LibreCat | DOI
 

2010 | Conference Paper | LibreCat-ID: 13640
A Triple Hybrid Interconnect for Many-Cores: Reconfigurable Mesh, NoC and Barrier
H. Giefers, M. Platzner, in: Proceedings of the 20th International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2010.
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2010 | Conference Paper | LibreCat-ID: 13641
Engineering Self-Coordinating Software Intensive Systems
W. Schäfer, M. Birattari, J. Blömer, M. Dorigo, G. Engels, R. O’Grady, M. Platzner, F.-J. Rammig, W. Reif, A. Trächtler, in: Proceedings of the Foundations of Software Engineering (FSE) and NITR & D/SPD Working Conference on the Future of Software Engineering Research (FoSER), 2010, pp. 321–324.
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2010 | Conference Paper | LibreCat-ID: 13642
A Self-Reconfigurable Lightweight Interconnect for Scalable Processor Fabrics
H. Giefers, M. Platzner, in: Proceedings of the 10th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010.
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2010 | Conference Paper | LibreCat-ID: 2223
Towards Adaptive Networking for Embedded Devices based on Reconfigurable Hardware
E. Lübbers, M. Platzner, C. Plessl, A. Keller, B. Plattner, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010, pp. 225–231.
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2010 | Conference Paper | LibreCat-ID: 2216
Pruning the Design Space for Just-In-Time Processor Customization
M. Grad, C. Plessl, in: Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), IEEE Computer Society, Los Alamitos, CA, USA, 2010, pp. 67–72.
LibreCat | DOI
 

2010 | Conference Paper | LibreCat-ID: 2224
An Open Source Circuit Library with Benchmarking Facilities
M. Grad, C. Plessl, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010, pp. 144–150.
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2010 | Conference Paper | LibreCat-ID: 2220
Configurable Processor Architectures: History and Trends
D. Andrews, C. Plessl, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010, p. 165.
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