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450 Publications
2001 | Journal Article | LibreCat-ID: 10713
Object-oriented domain specific compilers for programming FPGAs
O. Mencer, M. Platzner, M. Morf, M. J. Flynn, {IEEE} Transactions on Very Large Scale Integration ({VLSI}) Systems 9 (2001) 205–210.
LibreCat
| DOI
O. Mencer, M. Platzner, M. Morf, M. J. Flynn, {IEEE} Transactions on Very Large Scale Integration ({VLSI}) Systems 9 (2001) 205–210.
2001 | Misc | LibreCat-ID: 13463
Dynamically Reconfigurable Processors
R. Enzler, M. Platzner, Dynamically Reconfigurable Processors, TELEMATIK, Zeitschrift des Telematik-Ingebieur-Verbandes 7(1), 2001.
LibreCat
R. Enzler, M. Platzner, Dynamically Reconfigurable Processors, TELEMATIK, Zeitschrift des Telematik-Ingebieur-Verbandes 7(1), 2001.
2000 | Journal Article | LibreCat-ID: 6507
Reconfigurable accelerators for combinatorial problems
M. Platzner, Computer 33 (2000) 58–60.
LibreCat
| DOI
M. Platzner, Computer 33 (2000) 58–60.
2000 | Journal Article | LibreCat-ID: 10606
Synthesis of Interfaces and Communication in Reconfigurable Embedded Systems
M. Eisenring, M. Platzner, IEE Proceedings -- Computers & Digital Techniques 147 (2000) 159–165.
LibreCat
| DOI
M. Eisenring, M. Platzner, IEE Proceedings -- Computers & Digital Techniques 147 (2000) 159–165.
2000 | Journal Article | LibreCat-ID: 10725
Toward embedded qualitative simulation: a specialized computer architecture for QSim
M. Platzner, B. Rinner, R. Weiss, IEEE Intelligent Systems 15 (2000) 62–68.
LibreCat
| DOI
M. Platzner, B. Rinner, R. Weiss, IEEE Intelligent Systems 15 (2000) 62–68.
2000 | Conference Paper | LibreCat-ID: 13609
An Implementation Framework for Run-time Reconfigurable Systems
M.H. Eisenring, M. Platzner, in: Proceedings of the 2nd International Workshop on Engineering of Reconfigurable Hardware/Software Objects (ENREGLE), CSREA Press, 2000, pp. 151–157.
LibreCat
M.H. Eisenring, M. Platzner, in: Proceedings of the 2nd International Workshop on Engineering of Reconfigurable Hardware/Software Objects (ENREGLE), CSREA Press, 2000, pp. 151–157.
2000 | Conference Paper | LibreCat-ID: 13610
Optimization of Run-time Reconfigurable Embedded Systems
M. Eisenring, M. Platzner, in: Proceedings of the 10th International Workshop on Field Programmable Logic and Applications (FPL), Springer, 2000, pp. 565–574.
LibreCat
M. Eisenring, M. Platzner, in: Proceedings of the 10th International Workshop on Field Programmable Logic and Applications (FPL), Springer, 2000, pp. 565–574.
1999 | Conference Paper | LibreCat-ID: 13607
Dynamic circuit generation for Boolean satisfiability in an object-oriented design environment
O. Mencer, M. Platzner, in: Proceedings of the 32nd Annual Hawaii International Conference on Systems Sciences (HICSS-32), IEEE CS Press, 1999.
LibreCat
| DOI
O. Mencer, M. Platzner, in: Proceedings of the 32nd Annual Hawaii International Conference on Systems Sciences (HICSS-32), IEEE CS Press, 1999.
1999 | Conference Paper | LibreCat-ID: 13608
Communication Synthesis for Reconfigurable Embedded Systems
M. Eisenring, M. Platzner, L. Thiele, in: Proceedings of the 9th International Workshop on Field Programmable Logic and Applications (FPL), Springer, 1999, pp. 205–214.
LibreCat
| DOI
M. Eisenring, M. Platzner, L. Thiele, in: Proceedings of the 9th International Workshop on Field Programmable Logic and Applications (FPL), Springer, 1999, pp. 205–214.
1998 | Journal Article | LibreCat-ID: 10607
Reconfigurable Computer Architectures
M. Platzner, E&i Elektrotechnik Und Informationstechnik 115 (1998) 143–148.
LibreCat
M. Platzner, E&i Elektrotechnik Und Informationstechnik 115 (1998) 143–148.
1998 | Journal Article | LibreCat-ID: 10608
Design and Implementation of a Parallel Constraint Satisfaction Algorithm
M. Platzner, B. Rinner, International Journal of Computers & Their Applications 5 (1998) 106–116.
LibreCat
M. Platzner, B. Rinner, International Journal of Computers & Their Applications 5 (1998) 106–116.
1998 | Misc | LibreCat-ID: 13464
A Distributed Computer Architecture for Fast Qualitative Simulation
M. Platzner, B. Rinner, R. Weiss, A Distributed Computer Architecture for Fast Qualitative Simulation , Texas Instruments, The Elite Yearbook 1997 - Digital Signal Processing Solutions from Europe’s leading Universities, 1998.
LibreCat
M. Platzner, B. Rinner, R. Weiss, A Distributed Computer Architecture for Fast Qualitative Simulation , Texas Instruments, The Elite Yearbook 1997 - Digital Signal Processing Solutions from Europe’s leading Universities, 1998.
1998 | Conference Paper | LibreCat-ID: 13606
Acceleration of satisfiability algorithms by reconfigurable hardware
M. Platzner, G. De Micheli, in: Proceedings of the 8th International Workshop on Field Programmable Logic and Applications (FPL) , Springer , Berlin, Heidelberg, 1998, pp. 69–78.
LibreCat
| DOI
M. Platzner, G. De Micheli, in: Proceedings of the 8th International Workshop on Field Programmable Logic and Applications (FPL) , Springer , Berlin, Heidelberg, 1998, pp. 69–78.
1997 | Journal Article | LibreCat-ID: 10609
A Computer Architecture to Support Qualitative Simulation in Industrial Applications
M. Platzner, B. Rinner, R. Weiss, E & i Elektrotechnik Und Informationstechnik 114 (1997) 13–18.
LibreCat
M. Platzner, B. Rinner, R. Weiss, E & i Elektrotechnik Und Informationstechnik 114 (1997) 13–18.
1997 | Journal Article | LibreCat-ID: 10724
Parallel qualitative simulation
M. Platzner, B. Rinner, R. Weiss, Simulation Practice and Theory 5 (1997) 623–638.
LibreCat
| DOI
M. Platzner, B. Rinner, R. Weiss, Simulation Practice and Theory 5 (1997) 623–638.
1997 | Conference Paper | LibreCat-ID: 13603
Fast Signature Segmentation on a Multi-DSP Architecture
M. Platzner, L. Peters, in: Proceedings of the SPIE: Conference on Parallel and Distributed Methods for Image Processing, 1997.
LibreCat
M. Platzner, L. Peters, in: Proceedings of the SPIE: Conference on Parallel and Distributed Methods for Image Processing, 1997.
1997 | Conference Paper | LibreCat-ID: 13604
Specialized Architectures for Optical Flow Computation: A Performance Comparison of ASIC, DSP, and Multi-DSP
T. Röwekamp, M. Platzner, L. Peters, in: Proceedings of the 8th International Conference on Signal Processing Applications & Technology (ICSPAT), 1997, pp. 829–833.
LibreCat
T. Röwekamp, M. Platzner, L. Peters, in: Proceedings of the 8th International Conference on Signal Processing Applications & Technology (ICSPAT), 1997, pp. 829–833.
1996 | Conference Paper | LibreCat-ID: 13602
A Multi-DSP System with Dynamically Reconfigurable Processors
E. Lind, M. Platzner, B. Rinner, in: Proceedings of the 7th International Conference on Signal Processing Applications & Technology (ICSPAT), 1996.
LibreCat
E. Lind, M. Platzner, B. Rinner, in: Proceedings of the 7th International Conference on Signal Processing Applications & Technology (ICSPAT), 1996.
1995 | Journal Article | LibreCat-ID: 10610
Exploiting Parallelism in Constraint Satisfaction for Qualitative Simulation
M. Platzner, B. Rinner, R. Weiss, J.UCS Journal of Universal Computer Science 12 (1995) 811–820.
LibreCat
M. Platzner, B. Rinner, R. Weiss, J.UCS Journal of Universal Computer Science 12 (1995) 811–820.
1995 | Conference Paper | LibreCat-ID: 13469
A Distributed Computer Architecture for Qualitative Simulation based on a Multi-DSP and FPGAs
M. Platzner, B. Rinner, R. Weiss, in: Proceedings of the 3rd Euromicro Workshop on Parallel and Distributed Processing , IEEE CS Press, 1995, pp. 311–318.
LibreCat
M. Platzner, B. Rinner, R. Weiss, in: Proceedings of the 3rd Euromicro Workshop on Parallel and Distributed Processing , IEEE CS Press, 1995, pp. 311–318.