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41 Publications
2021 | Journal Article | LibreCat-ID: 27841
M.-C. Jakobs, F. Pauck, M. Platzner, H. Wehrheim, and T. Wiersema, “Software/Hardware Co-Verification for Custom Instruction Set Processors,” IEEE Access, 2021, doi: 10.1109/ACCESS.2021.3131213.
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2020 | Journal Article | LibreCat-ID: 45845
Y. Mahmood, A. Meier, and J. Schmidt, “Parameterized complexity of abduction in Schaefer’s framework,” Journal of Logic and Computation, vol. 31, no. 1, pp. 266–296, 2020, doi: 10.1093/logcom/exaa079.
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2018 | Bachelorsthesis | LibreCat-ID: 1097
F. P. Jentzsch, Enforcing IP Core Connection Properties with Verifiable Security Monitors. Universität Paderborn, 2018.
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2017 | Conference Paper | LibreCat-ID: 10676
N. Ho, P. Kaufmann, and M. Platzner, “Evolvable caches: Optimization of reconfigurable cache mappings for a LEON3/Linux-based multi-core processor,” in 2017 International Conference on Field Programmable Technology (ICFPT), 2017, pp. 215–218.
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2017 | Conference Paper | LibreCat-ID: 10780
Z. Guettatfi, P. Hübner, M. Platzner, and B. Rinner, “Computational self-awareness as design approach for visual sensor nodes,” in 12th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), 2017, pp. 1–8.
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2016 | Conference Paper | LibreCat-ID: 15873
A. Boschmann, A. Agne, L. M. Witschen, G. Thombansen, F. Kraus, and M. Platzner, “FPGA-based acceleration of high density myoelectric signal processing,” in 2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig), Mexiko City, Mexiko, 2016.
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2015 | Journal Article | LibreCat-ID: 39479
F. Vidor, T. Meyers, and U. Hilleringmann, “Flexible Electronics: Integration Processes for Organic and Inorganic Semiconductor-Based Thin-Film Transistors,” Electronics, vol. 4, no. 3, pp. 480–506, 2015, doi: 10.3390/electronics4030480.
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2014 | Journal Article | LibreCat-ID: 46266
B. Alizadeh, P. Behnam, and S. Sadeghi-Kohan, “A Scalable Formal Debugging Approach with Auto-Correction Capability based on Static Slicing and Dynamic Ranking for RTL Datapath Designs,” IEEE Transactions on Computers, pp. 1–1, 2014, doi: 10.1109/tc.2014.2329687.
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2012 | Conference Paper | LibreCat-ID: 36994
T. Xie, W. Müller, and F. Letombe, “Mutation-Analysis Driven Functional Verification of a Soft Microprocessor,” 2012, doi: 10.1109/SOCC.2012.6398362.
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2010 | Conference Paper | LibreCat-ID: 37009
M. F. S. Oliveira, H. Zabel, and W. Müller, “Assertion-Based Verification of RTOS Properties,” presented at the 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010), Dresden, 2010, doi: 10.1109/DATE.2010.5457130.
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2010 | Conference Paper | LibreCat-ID: 37011
K. Klobedanz, C. Kuznik, A. Thuy, and W. Müller, “Timing Modeling and Analysis for AUTOSAR-Based Software Development - A Case Study,” presented at the 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010), Dresden, 2010, doi: 10.1109/DATE.2010.5457125.
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2010 | Conference Paper | LibreCat-ID: 37040
M. Becker, G. Di Guglielmo, F. Fummi, W. Müller, G. Pravadelli, and T. Xie, “RTOS-Aware Refinement for TLM2.0-based HW/SW Design,” presented at the Design, Automation & Test in Europe Conference & Exhibition (DATE 2010), Dresden, 2010, doi: 10.1109/DATE.2010.5456965.
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2010 | Conference Paper | LibreCat-ID: 37053
W. Müller, M. F. da S. Oliveira, H. Zabel, and M. Becker, “Verification of Real-Time Properties for Hardware-Dependant Software,” presented at the IEEE International High Level Design Validation and Test Workshop (HLDVT), Anaheim, FL, USA, 2010.
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2009 | Conference Paper | LibreCat-ID: 2262
P. Kaufmann, C. Plessl, and M. Platzner, “EvoCaches: Application-specific Adaptation of Cache Mapping,” in Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 2009, pp. 11–18.
LibreCat
2006 | Conference Paper | LibreCat-ID: 38107
J. Großmann and W. Müller, “A Formal Behavioral Semantics for TestML,” Paphos, Cyprus, 2006, doi: 10.1109/ISoLA.2006.37.
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2005 | Conference Paper | LibreCat-ID: 39029
T. Schattkowsky, W. Müller, and A. Rettberg, “A Model-Based Approach for Executable Specification on Reconfigurable Hardware,” 2005, doi: 10.1109/DATE.2005.20.
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2005 | Conference Paper | LibreCat-ID: 39030
T. Schattkowsky and W. Müller, “A UML Virtual Machine for Embedded Systems,” 2005.
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2005 | Conference Paper | LibreCat-ID: 39032
T. Schattkowsky and W. Müller, “Transformation of UML State Machines for Direct Execution,” 2005, doi: 10.1109/VLHCC.2005.64.
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2004 | Conference Paper | LibreCat-ID: 2415
C. Plessl and M. Platzner, “Virtualization of Hardware – Introduction and Survey,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2004, pp. 63–69.
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2002 | Journal Article | LibreCat-ID: 39925
K. Goser, U. Hilleringmann, U. Rueckert, and K. Schumacher, “VLSI technologies for artificial neural networks,” IEEE Micro, vol. 9, no. 6, pp. 28–44, 2002, doi: 10.1109/40.42985.
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2002 | Journal Article | LibreCat-ID: 39926
K. Goser, U. Hilleringmann, U. Rueckert, and K. Schumacher, “VLSI technologies for artificial neural networks,” IEEE Micro, vol. 9, no. 6, pp. 28–44, 2002, doi: 10.1109/40.42985.
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2001 | Conference Paper | LibreCat-ID: 39421
W. Müller, J. Ruf, D. W. Hoffmann, J. Gerlach, T. Kropf, and W. Rosenstiehl, “The Simulation Semantics of SystemC,” presented at the Proceedings Design, Automation and Test in Europe. Conference and Exhibition 2001, 2001, doi: 10.1109/DATE.2001.915002.
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1997 | Conference Paper | LibreCat-ID: 39505
M. Dücker, C. Geiger, R. Hunstock, G. Lehrenfeld, and W. Müller, “Visual-Textual Prototyping of 4D Scenes,” presented at the 1997 IEEE Symposium on Visual Languages, 1997, doi: 10.1109/VL.1997.626601.
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1996 | Conference Paper | LibreCat-ID: 39521
P. Griebel, G. Lehrenfeld, W. Müller, C. Tahedl, and H. Uhr, “Integrating a Constraint Solver into a Real-Time Animation Environment,” 1996, doi: 10.1109/VL.1996.545262.
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