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15 Publications
2022 | Dissertation | LibreCat-ID: 29769 | 
Ahmed, Q. A. (2022). Hardware Trojans in Reconfigurable Computing. Paderborn University, Paderborn, Germany. https://doi.org/10.17619/UNIPB/1-1271
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2021 | Dissertation | LibreCat-ID: 26746 |
Wiersema, T. (2021). Guaranteeing Properties of Reconfigurable Hardware Circuits with Proof-Carrying Hardware. Paderborn University.
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2021 | Journal Article | LibreCat-ID: 27841
Jakobs, M.-C., Pauck, F., Platzner, M., Wehrheim, H., & Wiersema, T. (2021). Software/Hardware Co-Verification for Custom Instruction Set Processors. IEEE Access. https://doi.org/10.1109/ACCESS.2021.3131213
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2020 | Journal Article | LibreCat-ID: 17358
Witschen, L. M., Wiersema, T., & Platzner, M. (2020). Proof-carrying Approximate Circuits. IEEE Transactions On Very Large Scale Integration Systems, 28(9), 2084–2088. https://doi.org/10.1109/TVLSI.2020.3008061
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2019 | Preprint | LibreCat-ID: 16853
Witschen, L. M., Ghasemzadeh Mohammadi, H., Artmann, M., & Platzner, M. (n.d.). Jump Search: A Fast Technique for the Synthesis of Approximate Circuits. Fourth Workshop on Approximate Computing (AxC 2019).
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2018 | Bachelorsthesis | LibreCat-ID: 1097
Jentzsch, F. P. (2018). Enforcing IP Core Connection Properties with Verifiable Security Monitors. Universität Paderborn.
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2014 | Conference Paper | LibreCat-ID: 36917
Kuznik, C., Müller, W., & Defo, G. B. (2014). An Assisted Single Source Verification Metric Model Code Generation Methodology. Proceedings of the Electronic System Level Synthesis Conference (ESLSyn).
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2014 | Conference Paper | LibreCat-ID: 34585
Koppelmann, B., Messidat, B., Becker, M., Müller, W., & Scheytt, J. C. (2014). Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU. Proceedings of the Design and Verification Conference Europe (DVCON Europe).
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2008 | Conference Paper | LibreCat-ID: 2370
Woehrle, M., Plessl, C., Lim, R., Beutel, J., & Thiele, L. (2008). EvAnT: Analysis and Checking of event traces for Wireless Sensor Networks. IEEE Int. Conf. on Sensor Networks, Ubiquitous, and Trustworthy Computing (SUTC), 201–208. https://doi.org/10.1109/SUTC.2008.24
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2007 | Conference Paper | LibreCat-ID: 2393
Beutel, J., Dyer, M., Lim, R., Plessl, C., Woehrle, M., Yuecel, M., & Thiele, L. (2007). Automated Wireless Sensor Network Testing. Proc. Int. Conf. Networked Sensing Systems (INSS), 303–303. https://doi.org/10.1109/INSS.2007.4297445
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2004 | Conference Paper | LibreCat-ID: 39069
Flake, S., & Müller, W. (2004). Past- and Future-Oriented Time-Bound Temporal Properties with OCL. Proceedings of SEFM´04. Proceedings of the Second International Conference on Software Engineering and Formal Methods. https://doi.org/10.1109/SEFM.2004.1347516
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2002 | Conference Paper | LibreCat-ID: 39382
Müller, W., Dömer, R., & Gerstlauer, A. (2002). The Formal Execution Semantics of SpecC. Proceedings of the ISSS02. https://doi.org/10.1145/581199.581234
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2002 | Conference Paper | LibreCat-ID: 39403
Flake, S., & Müller, W. (2002). Specification of Real-Time Properties for UML Models. Proceedings of HICSS-35. Proceedings of the 35th Annual Hawaii International Conference on System Sciences, Big Island, HI, USA . https://doi.org/10.1109/HICSS.2002.994469
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2001 | Conference Paper | LibreCat-ID: 39421
Müller, W., Ruf, J., Hoffmann, D. W., Gerlach, J., Kropf, T., & Rosenstiehl, W. (2001). The Simulation Semantics of SystemC. Proceedings of the Design, Automation, and Test in Europe (DATE’01). Proceedings Design, Automation and Test in Europe. Conference and Exhibition 2001. https://doi.org/10.1109/DATE.2001.915002
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1995 | Book Chapter | LibreCat-ID: 34448
Börger, E., Glässer, U., & Müller, W. (1995). A Formal Definition of an Abstract VHDL’93 Simulator by EA-Machines. In C. Delgado Kloos & P. T. Breuer (Eds.), Semantics of VHDL (pp. 107–139). Kluwer Academic Publishers. https://doi.org/10.1007/978-1-4615-2237-9_5
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