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45 Publications
2025 | Dissertation | LibreCat-ID: 59232 | 
ReconOS64 - Hardware-Software Multithreading for Heterogeneous Platform FPGAs
L. Clausing, ReconOS64 - Hardware-Software Multithreading for Heterogeneous Platform FPGAs, Paderborn, 2025.
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L. Clausing, ReconOS64 - Hardware-Software Multithreading for Heterogeneous Platform FPGAs, Paderborn, 2025.
2024 | Mastersthesis | LibreCat-ID: 54245
Exploring Custom FPGA Accelerators for DNN-based RF Fingerprinting
L.-S. Henke, Exploring Custom FPGA Accelerators for DNN-Based RF Fingerprinting, 2024.
LibreCat
L.-S. Henke, Exploring Custom FPGA Accelerators for DNN-Based RF Fingerprinting, 2024.
2024 | Bachelorsthesis | LibreCat-ID: 59621
Efficient Automatic Speech Recognition on FPGAs for Datacenters
T. Erhart, Efficient Automatic Speech Recognition on FPGAs for Datacenters, 2024.
LibreCat
T. Erhart, Efficient Automatic Speech Recognition on FPGAs for Datacenters, 2024.
2024 | Bachelorsthesis | LibreCat-ID: 58132
Controlling I/O Devices from Hardware-Mapped ReconROS Nodes
M. Hartinger, Controlling I/O Devices from Hardware-Mapped ReconROS Nodes, Paderborn University, 2024.
LibreCat
M. Hartinger, Controlling I/O Devices from Hardware-Mapped ReconROS Nodes, Paderborn University, 2024.
2023 | Dissertation | LibreCat-ID: 47837
XCS for Self-awareness in Autonomous Computing Systems
T. Hansmeier, XCS for Self-Awareness in Autonomous Computing Systems, 2023.
LibreCat
T. Hansmeier, XCS for Self-Awareness in Autonomous Computing Systems, 2023.
2023 | Mastersthesis | LibreCat-ID: 54127
Efficient Neural Network Inference for Velocity Estimation in Athletic Relay Races on a Microcontroller
D.B. Anantha Rao, Efficient Neural Network Inference for Velocity Estimation in Athletic Relay Races on a Microcontroller, Paderborn University, 2023.
LibreCat
D.B. Anantha Rao, Efficient Neural Network Inference for Velocity Estimation in Athletic Relay Races on a Microcontroller, Paderborn University, 2023.
2023 | Bachelorsthesis | LibreCat-ID: 42839
An Evaluation of XCS on the OpenAI Gym
F. Mehlich, An Evaluation of XCS on the OpenAI Gym, Paderborn University, Paderborn, 2023.
LibreCat
F. Mehlich, An Evaluation of XCS on the OpenAI Gym, Paderborn University, Paderborn, 2023.
2023 | Bachelorsthesis | LibreCat-ID: 45762
Effizienzanalyse leichtgewichtiger Neuronaler Netze für FPGA-basierte Modulationsklassifikation
F. Simon-Mertens, Effizienzanalyse leichtgewichtiger Neuronaler Netze für FPGA-basierte Modulationsklassifikation, Paderborn University, 2023.
LibreCat
F. Simon-Mertens, Effizienzanalyse leichtgewichtiger Neuronaler Netze für FPGA-basierte Modulationsklassifikation, Paderborn University, 2023.
2023 | Bachelorsthesis | LibreCat-ID: 54243
Demonstrator for Dataflow-based DNN Acceleration for Vision Applications on Platform FPGAs
M.O. Oviasogie, Demonstrator for Dataflow-Based DNN Acceleration for Vision Applications on Platform FPGAs, Paderborn University, 2023.
LibreCat
M.O. Oviasogie, Demonstrator for Dataflow-Based DNN Acceleration for Vision Applications on Platform FPGAs, Paderborn University, 2023.
2023 | Bachelorsthesis | LibreCat-ID: 54241
Development of a Power Analysis Framework for Embedded FPGA Accelerators
L.D. Reuter, Development of a Power Analysis Framework for Embedded FPGA Accelerators, Paderborn University, 2023.
LibreCat
L.D. Reuter, Development of a Power Analysis Framework for Embedded FPGA Accelerators, Paderborn University, 2023.
2023 | Bachelorsthesis | LibreCat-ID: 54246
Verarbeitung von Sensordaten auf eingebetteten heterogenen FPGA-Systemen
R. Hamm, Verarbeitung von Sensordaten auf eingebetteten heterogenen FPGA-Systemen, Paderborn University, 2023.
LibreCat
R. Hamm, Verarbeitung von Sensordaten auf eingebetteten heterogenen FPGA-Systemen, Paderborn University, 2023.
2023 | Mastersthesis | LibreCat-ID: 54244
Design and Implementation of a RadioML Demonstrator based on an RFSoC Platform
S. AlAidroos, Design and Implementation of a RadioML Demonstrator Based on an RFSoC Platform, Paderborn University, 2023.
LibreCat
S. AlAidroos, Design and Implementation of a RadioML Demonstrator Based on an RFSoC Platform, Paderborn University, 2023.
2023 | Bachelorsthesis | LibreCat-ID: 54242
Bewertung der Xilinx Runtime Library zur Hardware/Software-Kommunikation
G. Evers, Bewertung der Xilinx Runtime Library zur Hardware/Software-Kommunikation, Paderborn University, 2023.
LibreCat
G. Evers, Bewertung der Xilinx Runtime Library zur Hardware/Software-Kommunikation, Paderborn University, 2023.
2023 | Dissertation | LibreCat-ID: 46482 |
Testinstrumente und Testdatenanalyse zur Verarbeitung von Unsicherheiten in Logikblöcken hochintegrierter Schaltungen
A. Sprenger, Testinstrumente und Testdatenanalyse zur Verarbeitung von Unsicherheiten in Logikblöcken hochintegrierter Schaltungen, Universität Paderborn, Paderborn, 2023.
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A. Sprenger, Testinstrumente und Testdatenanalyse zur Verarbeitung von Unsicherheiten in Logikblöcken hochintegrierter Schaltungen, Universität Paderborn, Paderborn, 2023.
2022 | Dissertation | LibreCat-ID: 29769 |
Hardware Trojans in Reconfigurable Computing
Q.A. Ahmed, Hardware Trojans in Reconfigurable Computing, Paderborn University, Paderborn, Germany, Paderborn, 2022.
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Q.A. Ahmed, Hardware Trojans in Reconfigurable Computing, Paderborn University, Paderborn, Germany, Paderborn, 2022.
2022 | Dissertation | LibreCat-ID: 34041
Frameworks and Methodologies for Search-based Approximate Logic Synthesis
L.M. Witschen, Frameworks and Methodologies for Search-Based Approximate Logic Synthesis, 2022.
LibreCat
| DOI
L.M. Witschen, Frameworks and Methodologies for Search-Based Approximate Logic Synthesis, 2022.
2022 | Mastersthesis | LibreCat-ID: 45715
FreeRTOS on a MicroBlaze Soft-Core Processor with Hardware Accelerators
V.I. Tcheussi Ngayap, FreeRTOS on a MicroBlaze Soft-Core Processor with Hardware Accelerators, 2022.
LibreCat
V.I. Tcheussi Ngayap, FreeRTOS on a MicroBlaze Soft-Core Processor with Hardware Accelerators, 2022.
2021 | Dissertation | LibreCat-ID: 26746 |
Guaranteeing Properties of Reconfigurable Hardware Circuits with Proof-Carrying Hardware
T. Wiersema, Guaranteeing Properties of Reconfigurable Hardware Circuits with Proof-Carrying Hardware, Paderborn University, Paderborn, 2021.
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T. Wiersema, Guaranteeing Properties of Reconfigurable Hardware Circuits with Proof-Carrying Hardware, Paderborn University, Paderborn, 2021.
2021 | Mastersthesis | LibreCat-ID: 29151
A Comparison of Machine Learning Techniques for the On-line Characterization of Tasks Executed on Heterogeneous Compute Nodes
C. Kashikar, A Comparison of Machine Learning Techniques for the On-Line Characterization of Tasks Executed on Heterogeneous Compute Nodes, Paderborn University, Paderborn, 2021.
LibreCat
C. Kashikar, A Comparison of Machine Learning Techniques for the On-Line Characterization of Tasks Executed on Heterogeneous Compute Nodes, Paderborn University, Paderborn, 2021.
2021 | Bachelorsthesis | LibreCat-ID: 22216
Decomposition of Arithmetic Components for the Approximate Circuit Synthesis with EvoApproxLib
J.W. Rehnen, Decomposition of Arithmetic Components for the Approximate Circuit Synthesis with EvoApproxLib, 2021.
LibreCat
J.W. Rehnen, Decomposition of Arithmetic Components for the Approximate Circuit Synthesis with EvoApproxLib, 2021.
2021 | Bachelorsthesis | LibreCat-ID: 22483
Implementation and Profiling of XCS in the Context of Embedded Systems
M. Brede, Implementation and Profiling of XCS in the Context of Embedded Systems, Paderborn University, Paderborn, 2021.
LibreCat
M. Brede, Implementation and Profiling of XCS in the Context of Embedded Systems, Paderborn University, Paderborn, 2021.
2021 | Mastersthesis | LibreCat-ID: 29540
Design and Implementation of a ReconROS-based Obstacle Avoidance System
M.A. Sheikh, Design and Implementation of a ReconROS-Based Obstacle Avoidance System, Paderborn University, 2021.
LibreCat
M.A. Sheikh, Design and Implementation of a ReconROS-Based Obstacle Avoidance System, Paderborn University, 2021.
2020 | Mastersthesis | LibreCat-ID: 21324
Comparison of Feature Selection Techniques to Improve Approximate Circuit Synthesis
K. Chandrakar, Comparison of Feature Selection Techniques to Improve Approximate Circuit Synthesis, 2020.
LibreCat
K. Chandrakar, Comparison of Feature Selection Techniques to Improve Approximate Circuit Synthesis, 2020.
2020 | Bachelorsthesis | LibreCat-ID: 21432
Evaluation of a ReconOS-ROS Combination based on a Video Processing Application
L.-S. Henke, Evaluation of a ReconOS-ROS Combination Based on a Video Processing Application, 2020.
LibreCat
L.-S. Henke, Evaluation of a ReconOS-ROS Combination Based on a Video Processing Application, 2020.
2020 | Bachelorsthesis | LibreCat-ID: 20820
Implementing Machine Learning Functions as PYNQ FPGA Overlays
S. Thiele, Implementing Machine Learning Functions as PYNQ FPGA Overlays, 2020.
LibreCat
S. Thiele, Implementing Machine Learning Functions as PYNQ FPGA Overlays, 2020.
2020 | Mastersthesis | LibreCat-ID: 20821
Extension and Evaluation of Python-based High-Level Synthesis Tool Flows
V. Jaganath, Extension and Evaluation of Python-Based High-Level Synthesis Tool Flows, 2020.
LibreCat
V. Jaganath, Extension and Evaluation of Python-Based High-Level Synthesis Tool Flows, 2020.
2020 | Mastersthesis | LibreCat-ID: 21433
Design and Implementation of a ReconOS-based TensorFlow Lite Delegate Architecture
F.P. Jentzsch, Design and Implementation of a ReconOS-Based TensorFlow Lite Delegate Architecture, 2020.
LibreCat
F.P. Jentzsch, Design and Implementation of a ReconOS-Based TensorFlow Lite Delegate Architecture, 2020.
2019 | Mastersthesis | LibreCat-ID: 15920
A Bitstream-Level Proof-Carrying Hardware Technique for Information Flow Tracking
M. Keerthipati, A Bitstream-Level Proof-Carrying Hardware Technique for Information Flow Tracking, Universität Paderborn, 2019.
LibreCat
M. Keerthipati, A Bitstream-Level Proof-Carrying Hardware Technique for Information Flow Tracking, Universität Paderborn, 2019.
2019 | Mastersthesis | LibreCat-ID: 14831
FPGA Acceleration of String Search Techniques in Huge Data Sets
N.S. Sabu, FPGA Acceleration of String Search Techniques in Huge Data Sets, Paderborn University, 2019.
LibreCat
N.S. Sabu, FPGA Acceleration of String Search Techniques in Huge Data Sets, Paderborn University, 2019.
2019 | Mastersthesis | LibreCat-ID: 14546
Autonomous Operation of High-Performance Compute Nodes through Self-Awareness and Learning Classifiers
T. Hansmeier, Autonomous Operation of High-Performance Compute Nodes through Self-Awareness and Learning Classifiers, Universität Paderborn, 2019.
LibreCat
T. Hansmeier, Autonomous Operation of High-Performance Compute Nodes through Self-Awareness and Learning Classifiers, Universität Paderborn, 2019.
2019 | Mastersthesis | LibreCat-ID: 15874 |
Implementing a Real-time System on a Platform FPGA operated with ReconOS
C. Lienen, Implementing a Real-Time System on a Platform FPGA Operated with ReconOS, Universität Paderborn, n.d.
LibreCat
| Files available
C. Lienen, Implementing a Real-Time System on a Platform FPGA Operated with ReconOS, Universität Paderborn, n.d.
2018 | Bachelorsthesis | LibreCat-ID: 3365
Static Scheduling Algorithms for Heterogeneous Compute Nodes
J.-P. Schnuer, Static Scheduling Algorithms for Heterogeneous Compute Nodes, Universität Paderborn, 2018.
LibreCat
J.-P. Schnuer, Static Scheduling Algorithms for Heterogeneous Compute Nodes, Universität Paderborn, 2018.
2018 | Bachelorsthesis | LibreCat-ID: 3366
Evaluation of OpenCL-based Compilation for FPGAs
M. Croce, Evaluation of OpenCL-Based Compilation for FPGAs, Universität Paderborn, 2018.
LibreCat
M. Croce, Evaluation of OpenCL-Based Compilation for FPGAs, Universität Paderborn, 2018.
2018 | Dissertation | LibreCat-ID: 3720
FPGA-based Reconfigurable Cache Mapping Schemes: Design and Optimization
N. Ho, FPGA-Based Reconfigurable Cache Mapping Schemes: Design and Optimization, Universität Paderborn, 2018.
LibreCat
| DOI
N. Ho, FPGA-Based Reconfigurable Cache Mapping Schemes: Design and Optimization, Universität Paderborn, 2018.
2017 | Bachelorsthesis | LibreCat-ID: 3580
An FPGA Accelerator for Checking Resolution Proofs
T. Hansmeier, An FPGA Accelerator for Checking Resolution Proofs, Universität Paderborn, 2017.
LibreCat
T. Hansmeier, An FPGA Accelerator for Checking Resolution Proofs, Universität Paderborn, 2017.
2017 | Mastersthesis | LibreCat-ID: 1157
A Framework for the Synthesis of Approximate Circuits
L.M. Witschen, A Framework for the Synthesis of Approximate Circuits, Universität Paderborn, 2017.
LibreCat
L.M. Witschen, A Framework for the Synthesis of Approximate Circuits, Universität Paderborn, 2017.
2017 | Mastersthesis | LibreCat-ID: 74
OpenCL-basierte Videoverarbeitung auf heterogenen Rechenknoten
C. Knorr, OpenCL-basierte Videoverarbeitung auf heterogenen Rechenknoten, Universität Paderborn, 2017.
LibreCat
C. Knorr, OpenCL-basierte Videoverarbeitung auf heterogenen Rechenknoten, Universität Paderborn, 2017.
2015 | Bachelorsthesis | LibreCat-ID: 3364
Evaluation von Bildverarbeitungsalgorithmen in heterogenen Rechenknoten
C. Knorr, Evaluation von Bildverarbeitungsalgorithmen in heterogenen Rechenknoten, Universität Paderborn, 2015.
LibreCat
C. Knorr, Evaluation von Bildverarbeitungsalgorithmen in heterogenen Rechenknoten, Universität Paderborn, 2015.
2014 | Mastersthesis | LibreCat-ID: 10701
Hardware Acceleration of Mechatronic Controllers on a Zynq Platform FPGA
B. Koch, Hardware Acceleration of Mechatronic Controllers on a Zynq Platform FPGA, Paderborn University, 2014.
LibreCat
B. Koch, Hardware Acceleration of Mechatronic Controllers on a Zynq Platform FPGA, Paderborn University, 2014.
2014 | Dissertation | LibreCat-ID: 10733
Parallel Monte-Carlo Tree Search for HPC Systems and its Application to Computer Go
L. Schäfers, Parallel Monte-Carlo Tree Search for HPC Systems and Its Application to Computer Go, Logos Verlag Berlin GmbH, Berlin, 2014.
LibreCat
L. Schäfers, Parallel Monte-Carlo Tree Search for HPC Systems and Its Application to Computer Go, Logos Verlag Berlin GmbH, Berlin, 2014.
2014 | Mastersthesis | LibreCat-ID: 10744
Multithreaded Parallelization of Mechatronic Controllers on a Zynq Platform FPGA
S. Surmund, Multithreaded Parallelization of Mechatronic Controllers on a Zynq Platform FPGA, Paderborn University, 2014.
LibreCat
S. Surmund, Multithreaded Parallelization of Mechatronic Controllers on a Zynq Platform FPGA, Paderborn University, 2014.
2013 | Dissertation | LibreCat-ID: 11619
Adapting Hardware Systems by Means of Multi-Objective Evolution
P. Kaufmann, Adapting Hardware Systems by Means of Multi-Objective Evolution, Logos Verlag Berlin GmbH, Berlin, 2013.
LibreCat
P. Kaufmann, Adapting Hardware Systems by Means of Multi-Objective Evolution, Logos Verlag Berlin GmbH, Berlin, 2013.
2013 | Dissertation | LibreCat-ID: 501
Performance and thermal management on self-adaptive hybrid multi-cores
M. Happe, Performance and Thermal Management on Self-Adaptive Hybrid Multi-Cores, Logos Verlag Berlin GmbH, Berlin, 2013.
LibreCat
| Files available
M. Happe, Performance and Thermal Management on Self-Adaptive Hybrid Multi-Cores, Logos Verlag Berlin GmbH, Berlin, 2013.
2012 | Dissertation | LibreCat-ID: 586 |
Proof-Carrying Hardware: A Novel Approach to Reconfigurable Hardware Security
S. Drzevitzky, Proof-Carrying Hardware: A Novel Approach to Reconfigurable Hardware Security, Universität Paderborn, 2012.
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S. Drzevitzky, Proof-Carrying Hardware: A Novel Approach to Reconfigurable Hardware Security, Universität Paderborn, 2012.
2012 | Dissertation | LibreCat-ID: 10652
Design and Programming of Reconfigurable Mesh based Many-Cores
H. Giefers, Design and Programming of Reconfigurable Mesh Based Many-Cores, Logos Verlag Berlin GmbH, Berlin, 2012.
LibreCat
H. Giefers, Design and Programming of Reconfigurable Mesh Based Many-Cores, Logos Verlag Berlin GmbH, Berlin, 2012.