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25 Publications
2021 | Bachelorsthesis | LibreCat-ID: 22216
Decomposition of Arithmetic Components for the Approximate Circuit Synthesis with EvoApproxLib
J.W. Rehnen, Decomposition of Arithmetic Components for the Approximate Circuit Synthesis with EvoApproxLib, 2021.
LibreCat
J.W. Rehnen, Decomposition of Arithmetic Components for the Approximate Circuit Synthesis with EvoApproxLib, 2021.
2021 | Bachelorsthesis | LibreCat-ID: 22483
Implementation and Profiling of XCS in the Context of Embedded Systems
M. Brede, Implementation and Profiling of XCS in the Context of Embedded Systems, Paderborn University, Paderborn, 2021.
LibreCat
M. Brede, Implementation and Profiling of XCS in the Context of Embedded Systems, Paderborn University, Paderborn, 2021.
2020 | Bachelorsthesis | LibreCat-ID: 20820
Implementing Machine Learning Functions as PYNQ FPGA Overlays
S. Thiele, Implementing Machine Learning Functions as PYNQ FPGA Overlays, 2020.
LibreCat
S. Thiele, Implementing Machine Learning Functions as PYNQ FPGA Overlays, 2020.
2020 | Mastersthesis | LibreCat-ID: 20821
Extension and Evaluation of Python-based High-Level Synthesis Tool Flows
V. Jaganath, Extension and Evaluation of Python-Based High-Level Synthesis Tool Flows, 2020.
LibreCat
V. Jaganath, Extension and Evaluation of Python-Based High-Level Synthesis Tool Flows, 2020.
2020 | Mastersthesis | LibreCat-ID: 21324
Comparison of Feature Selection Techniques to Improve Approximate Circuit Synthesis
K. Chandrakar, Comparison of Feature Selection Techniques to Improve Approximate Circuit Synthesis, 2020.
LibreCat
K. Chandrakar, Comparison of Feature Selection Techniques to Improve Approximate Circuit Synthesis, 2020.
2020 | Bachelorsthesis | LibreCat-ID: 21432
Evaluation of a ReconOS-ROS Combination based on a Video Processing Application
L.-S. Henke, Evaluation of a ReconOS-ROS Combination Based on a Video Processing Application, 2020.
LibreCat
L.-S. Henke, Evaluation of a ReconOS-ROS Combination Based on a Video Processing Application, 2020.
2020 | Mastersthesis | LibreCat-ID: 21433
Design and Implementation of a ReconOS-based TensorFlow Lite Delegate Architecture
F.P. Jentzsch, Design and Implementation of a ReconOS-Based TensorFlow Lite Delegate Architecture, 2020.
LibreCat
F.P. Jentzsch, Design and Implementation of a ReconOS-Based TensorFlow Lite Delegate Architecture, 2020.
2019 | Mastersthesis | LibreCat-ID: 15920
A Bitstream-Level Proof-Carrying Hardware Technique for Information Flow Tracking
M. Keerthipati, A Bitstream-Level Proof-Carrying Hardware Technique for Information Flow Tracking, Universität Paderborn, 2019.
LibreCat
M. Keerthipati, A Bitstream-Level Proof-Carrying Hardware Technique for Information Flow Tracking, Universität Paderborn, 2019.
2019 | Mastersthesis | LibreCat-ID: 15874
Implementing a Real-time System on a Platform FPGA operated with ReconOS
C. Lienen, Implementing a Real-Time System on a Platform FPGA Operated with ReconOS, Universität Paderborn, n.d.
LibreCat
| Files available
C. Lienen, Implementing a Real-Time System on a Platform FPGA Operated with ReconOS, Universität Paderborn, n.d.
2019 | Mastersthesis | LibreCat-ID: 14831
FPGA Acceleration of String Search Techniques in Huge Data Sets
N.S. Sabu, FPGA Acceleration of String Search Techniques in Huge Data Sets, Paderborn University, 2019.
LibreCat
N.S. Sabu, FPGA Acceleration of String Search Techniques in Huge Data Sets, Paderborn University, 2019.