6 Publications
2024 | Conference Paper | LibreCat-ID: 53579
Palomero Bernardo P, Schmid P, Bringmann O, et al. A Scalable RISC-V Hardware Platform for Intelligent Sensor Processing. In: DATE 24 - Design Automation and Test in Europe. ; 2024.
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2023 | Patent | LibreCat-ID: 48631 | 
Iftekhar M, Scheytt JC. ENHANCED PLL CIRCUIT. Published online 2023.
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2023 | Conference Abstract | LibreCat-ID: 48961
Iftekhar M, Gowda H, Kneuper P, Sadiye B, Müller W, Scheytt C. A 28-Gb/s 27.2mW NRZ Full-Rate Bang-Bang Clock and Data Recovery in 22 nm FD-SOI CMOS Technology. In: 2023 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS). ; 2023. doi:10.1109/BCICTS54660.2023.10310954
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2022 | Conference Paper | LibreCat-ID: 29770
Abughannam S, Kruse S, Iftekhar M, Scheytt JC. Design and Measurements of a Low-power Low-Date-rate Direct-detection Wireless Receiver with Improved Co-channel Interference Robustness. In: German Microwave Conference 2022 (GeMiC 2022). ; 2022.
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2021 | Conference Paper | LibreCat-ID: 29213
Iftekhar M, Gudyriev S, Scheytt JC. Reference-less Bang-bang CDR with Enhanced Frequency Acquisition Range Using Static and Modulated Integral Branch Offset Currents. In: The 2021 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium. ; 2021. doi:10.1109/BCICTS50416.2021.9682207
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2020 | Conference Paper | LibreCat-ID: 24028
Iftekhar M, Gudyriev S, Scheytt C. 28 Gbps Bang-Bang CDR for 100G PSM4 with Independently Tunable Proportional and Integral Parameters of the Loop Filter in 0.25 µm Photonic BiCMOS Technology. In: 2020 IEEE 20th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF). IEEE; 2020. doi:10.1109/SIRF46766.2020.9040190
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6 Publications
2024 | Conference Paper | LibreCat-ID: 53579
Palomero Bernardo P, Schmid P, Bringmann O, et al. A Scalable RISC-V Hardware Platform for Intelligent Sensor Processing. In: DATE 24 - Design Automation and Test in Europe. ; 2024.
LibreCat
2023 | Patent | LibreCat-ID: 48631 |
Iftekhar M, Scheytt JC. ENHANCED PLL CIRCUIT. Published online 2023.
LibreCat
| Download (ext.)
2023 | Conference Abstract | LibreCat-ID: 48961
Iftekhar M, Gowda H, Kneuper P, Sadiye B, Müller W, Scheytt C. A 28-Gb/s 27.2mW NRZ Full-Rate Bang-Bang Clock and Data Recovery in 22 nm FD-SOI CMOS Technology. In: 2023 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS). ; 2023. doi:10.1109/BCICTS54660.2023.10310954
LibreCat
| Files available
| DOI
2022 | Conference Paper | LibreCat-ID: 29770
Abughannam S, Kruse S, Iftekhar M, Scheytt JC. Design and Measurements of a Low-power Low-Date-rate Direct-detection Wireless Receiver with Improved Co-channel Interference Robustness. In: German Microwave Conference 2022 (GeMiC 2022). ; 2022.
LibreCat
| Files available
2021 | Conference Paper | LibreCat-ID: 29213
Iftekhar M, Gudyriev S, Scheytt JC. Reference-less Bang-bang CDR with Enhanced Frequency Acquisition Range Using Static and Modulated Integral Branch Offset Currents. In: The 2021 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium. ; 2021. doi:10.1109/BCICTS50416.2021.9682207
LibreCat
| Files available
| DOI
2020 | Conference Paper | LibreCat-ID: 24028
Iftekhar M, Gudyriev S, Scheytt C. 28 Gbps Bang-Bang CDR for 100G PSM4 with Independently Tunable Proportional and Integral Parameters of the Loop Filter in 0.25 µm Photonic BiCMOS Technology. In: 2020 IEEE 20th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF). IEEE; 2020. doi:10.1109/SIRF46766.2020.9040190
LibreCat
| Files available
| DOI