6 Publications

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[6]
2024 | Conference Paper | LibreCat-ID: 53579
P. Palomero Bernardo et al., “A Scalable RISC-V Hardware Platform for Intelligent Sensor Processing,” Valencia, Spain, 2024.
LibreCat
 
[5]
2023 | Patent | LibreCat-ID: 48631 | OA
M. Iftekhar and J. C. Scheytt, “ ENHANCED PLL CIRCUIT.” 2023.
LibreCat | Download (ext.)
 
[4]
2023 | Conference Abstract | LibreCat-ID: 48961
M. Iftekhar, H. Gowda, P. Kneuper, B. Sadiye, W. Müller, and C. Scheytt, “A 28-Gb/s 27.2mW NRZ Full-Rate Bang-Bang Clock and Data Recovery in 22 nm FD-SOI CMOS Technology,” presented at the 2023 IEEE BiCMOS und Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS), Monterey, CA, USA, 2023, doi: 10.1109/BCICTS54660.2023.10310954.
LibreCat | Files available | DOI
 
[3]
2022 | Conference Paper | LibreCat-ID: 29770
S. Abughannam, S. Kruse, M. Iftekhar, and J. C. Scheytt, “Design and Measurements of a Low-power Low-Date-rate Direct-detection Wireless Receiver with Improved Co-channel Interference Robustness,” 2022.
LibreCat | Files available
 
[2]
2021 | Conference Paper | LibreCat-ID: 29213
M. Iftekhar, S. Gudyriev, and J. C. Scheytt, “Reference-less Bang-bang CDR with Enhanced Frequency Acquisition Range Using Static and Modulated Integral Branch Offset Currents,” 2021, doi: 10.1109/BCICTS50416.2021.9682207.
LibreCat | Files available | DOI
 
[1]
2020 | Conference Paper | LibreCat-ID: 24028
M. Iftekhar, S. Gudyriev, and C. Scheytt, “28 Gbps Bang-Bang CDR for 100G PSM4 with Independently Tunable Proportional and Integral Parameters of the Loop Filter in 0.25 µm Photonic BiCMOS Technology,” 2020, doi: 10.1109/SIRF46766.2020.9040190.
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6 Publications

Mark all

[6]
2024 | Conference Paper | LibreCat-ID: 53579
P. Palomero Bernardo et al., “A Scalable RISC-V Hardware Platform for Intelligent Sensor Processing,” Valencia, Spain, 2024.
LibreCat
 
[5]
2023 | Patent | LibreCat-ID: 48631 | OA
M. Iftekhar and J. C. Scheytt, “ ENHANCED PLL CIRCUIT.” 2023.
LibreCat | Download (ext.)
 
[4]
2023 | Conference Abstract | LibreCat-ID: 48961
M. Iftekhar, H. Gowda, P. Kneuper, B. Sadiye, W. Müller, and C. Scheytt, “A 28-Gb/s 27.2mW NRZ Full-Rate Bang-Bang Clock and Data Recovery in 22 nm FD-SOI CMOS Technology,” presented at the 2023 IEEE BiCMOS und Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS), Monterey, CA, USA, 2023, doi: 10.1109/BCICTS54660.2023.10310954.
LibreCat | Files available | DOI
 
[3]
2022 | Conference Paper | LibreCat-ID: 29770
S. Abughannam, S. Kruse, M. Iftekhar, and J. C. Scheytt, “Design and Measurements of a Low-power Low-Date-rate Direct-detection Wireless Receiver with Improved Co-channel Interference Robustness,” 2022.
LibreCat | Files available
 
[2]
2021 | Conference Paper | LibreCat-ID: 29213
M. Iftekhar, S. Gudyriev, and J. C. Scheytt, “Reference-less Bang-bang CDR with Enhanced Frequency Acquisition Range Using Static and Modulated Integral Branch Offset Currents,” 2021, doi: 10.1109/BCICTS50416.2021.9682207.
LibreCat | Files available | DOI
 
[1]
2020 | Conference Paper | LibreCat-ID: 24028
M. Iftekhar, S. Gudyriev, and C. Scheytt, “28 Gbps Bang-Bang CDR for 100G PSM4 with Independently Tunable Proportional and Integral Parameters of the Loop Filter in 0.25 µm Photonic BiCMOS Technology,” 2020, doi: 10.1109/SIRF46766.2020.9040190.
LibreCat | Files available | DOI
 

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