Heinrich Riebler

Paderborn Center for Parallel Computing (PC2)
Hochleistungsrechnen
heinrich.riebler@uni-paderborn.de
ID
8961

21 Publications

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[21]
2025 | Conference Paper | LibreCat-ID: 59804
Jungemann, L., Wintermann, B., Riebler, H., & Plessl, C. (n.d.). FINN-HPC: Closing the Gap for Energy-Efficient Neural Network Inference on FPGAs in HPC. Proceedings of the 15th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies. The International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies 2025 (HEART 2025), Kumamoto, Japan. https://doi.org/10.1145/3728179.3728189
LibreCat | DOI
 
[20]
2025 | Conference Paper | LibreCat-ID: 59816
Pape, G., Wintermann, B., Jungemann, L., Lass, M., Meyer, M., Riebler, H., & Plessl, C. (n.d.). AuroraFlow, an Easy-to-Use, Low-Latency FPGA Communication Solution Demonstrated on Multi-FPGA Neural Network Inference. Proceedings of the 15th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies. The International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies 2025 (HEART 2025) , Kumamoto, Japan.
LibreCat
 
[19]
2024 | Journal Article | LibreCat-ID: 53663 | OA
Bauer, C., Kenter, T., Lass, M., Mazur, L., Meyer, M., Nitsche, H., Riebler, H., Schade, R., Schwarz, M., Winnwa, N., Wiens, A., Wu, X., Plessl, C., & Simon, J. (2024). Noctua 2 Supercomputer. Journal of Large-Scale Research Facilities, 9. https://doi.org/10.17815/jlsrf-8-187
LibreCat | Files available | DOI
 
[18]
2024 | Journal Article | LibreCat-ID: 56604 | OA
Van Hirtum, L., De Causmaecker, P., Goemaere, J., Kenter, T., Riebler, H., Lass, M., & Plessl, C. (2024). A Computation of the Ninth Dedekind Number Using FPGA Supercomputing. ACM Transactions on Reconfigurable Technology and Systems, 17(3), 1–28. https://doi.org/10.1145/3674147
LibreCat | DOI | Download (ext.)
 
[17]
2023 | Preprint | LibreCat-ID: 43439
Van Hirtum, L., De Causmaecker, P., Goemaere, J., Kenter, T., Riebler, H., Lass, M., & Plessl, C. (2023). A computation of D(9) using FPGA Supercomputing. In arXiv:2304.03039.
LibreCat | arXiv
 
[16]
2023 | Book Chapter | LibreCat-ID: 45893 | OA
Hansmeier, T., Kenter, T., Meyer, M., Riebler, H., Platzner, M., & Plessl, C. (2023). Compute Centers I: Heterogeneous Execution Environments. In C.-J. Haake, F. Meyer auf der Heide, M. Platzner, H. Wachsmuth, & H. Wehrheim (Eds.), On-The-Fly Computing -- Individualized IT-services in dynamic markets (Vol. 412, pp. 165–182). Heinz Nixdorf Institut, Universität Paderborn. https://doi.org/10.5281/zenodo.8068642
LibreCat | Files available | DOI
 
[15]
2019 | Journal Article | LibreCat-ID: 7689
Riebler, H., Vaz, G. F., Kenter, T., & Plessl, C. (2019). Transparent Acceleration for Heterogeneous Platforms with Compilation to OpenCL. ACM Trans. Archit. Code Optim. (TACO), 16(2), 14:1–14:26. https://doi.org/10.1145/3319423
LibreCat | Files available | DOI
 
[14]
2019 | Dissertation | LibreCat-ID: 34167
Riebler, H. (2019). Efficient parallel branch-and-bound search on FPGAs using work stealing and instance-specific designs. https://doi.org/10.17619/UNIPB/1-830
LibreCat | DOI
 
[13]
2018 | Conference Paper | LibreCat-ID: 1204
Riebler, H., Vaz, G. F., Kenter, T., & Plessl, C. (2018). Automated Code Acceleration Targeting Heterogeneous OpenCL Devices. Proc. ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP). https://doi.org/10.1145/3178487.3178534
LibreCat | Files available | DOI
 
[12]
2017 | Journal Article | LibreCat-ID: 18
Riebler, H., Lass, M., Mittendorf, R., Löcke, T., & Plessl, C. (2017). Efficient Branch and Bound on FPGAs Using Work Stealing and Instance-Specific Designs. ACM Transactions on Reconfigurable Technology and Systems (TRETS), 10(3), 24:1-24:23. https://doi.org/10.1145/3053687
LibreCat | Files available | DOI
 
[11]
2016 | Conference Paper | LibreCat-ID: 31
Riebler, H., Vaz, G. F., Plessl, C., Trainiti, E. M. G., Durelli, G. C., & Bolchini, C. (2016). Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems. Proc. HiPEAC Workshop on Reonfigurable Computing (WRC).
LibreCat | Files available
 
[10]
2016 | Conference Paper | LibreCat-ID: 138
Riebler, H., Vaz, G. F., Plessl, C., Trainiti, E. M. G., Durelli, G. C., Del Sozzo, E., Santambrogio, M. D., & Bolchini, C. (2016). Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems. Proceedings of International Forum on Research and Technologies for Society and Industry (RTSI), 1–5. https://doi.org/10.1109/RTSI.2016.7740545
LibreCat | Files available | DOI
 
[9]
2016 | Journal Article | LibreCat-ID: 165
Vaz, G. F., Riebler, H., Kenter, T., & Plessl, C. (2016). Potential and Methods for Embedding Dynamic Offloading Decisions into Application Code. Computers and Electrical Engineering, 55, 91–111. https://doi.org/10.1016/j.compeleceng.2016.04.021
LibreCat | Files available | DOI
 
[8]
2016 | Conference Paper | LibreCat-ID: 171
Kenter, T., Vaz, G. F., Riebler, H., & Plessl, C. (2016). Opportunities for deferring application partitioning and accelerator synthesis to runtime (extended abstract). Workshop on Reconfigurable Computing (WRC).
LibreCat | Files available
 
[7]
2015 | Conference Paper | LibreCat-ID: 238
Damschen, M., Riebler, H., Vaz, G. F., & Plessl, C. (2015). Transparent offloading of computational hotspots from binary code to Xeon Phi. Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE), 1078–1083. https://doi.org/10.7873/DATE.2015.1124
LibreCat | Files available | DOI
 
[6]
2014 | Conference Paper | LibreCat-ID: 377
Riebler, H., Kenter, T., Plessl, C., & Sorge, C. (2014). Reconstructing AES Key Schedules from Decayed Memory with FPGAs. Proceedings of Field-Programmable Custom Computing Machines (FCCM), 222–229. https://doi.org/10.1109/FCCM.2014.67
LibreCat | Files available | DOI
 
[5]
2014 | Conference Paper | LibreCat-ID: 1778
C. Durelli, G., Pogliani, M., Miele, A., Plessl, C., Riebler, H., Vaz, G. F., D. Santambrogio, M., & Bolchini, C. (2014). Runtime Resource Management in Heterogeneous System Architectures: The SAVE Approach. Proc. Int. Symp. on Parallel and Distributed Processing with Applications (ISPA), 142–149. https://doi.org/10.1109/ISPA.2014.27
LibreCat | DOI
 
[4]
2014 | Conference Paper | LibreCat-ID: 439
Vaz, G. F., Riebler, H., Kenter, T., & Plessl, C. (2014). Deferring Accelerator Offloading Decisions to Application Runtime. Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 1–8. https://doi.org/10.1109/ReConFig.2014.7032509
LibreCat | Files available | DOI
 
[3]
2013 | Mastersthesis | LibreCat-ID: 521
Riebler, H. (2013). Identifikation und Wiederherstellung von kryptographischen Schlüsseln mit FPGAs. Universität Paderborn.
LibreCat
 
[2]
2013 | Mastersthesis | LibreCat-ID: 10730
Riebler, H. (2013). Identifikation und Wiederherstellung von kryptographischen Schlüsseln mit FPGAs. Paderborn University.
LibreCat
 
[1]
2013 | Conference Paper | LibreCat-ID: 528
Riebler, H., Kenter, T., Sorge, C., & Plessl, C. (2013). FPGA-accelerated Key Search for Cold-Boot Attacks against AES. Proceedings of the International Conference on Field-Programmable Technology (FPT), 386–389. https://doi.org/10.1109/FPT.2013.6718394
LibreCat | Files available | DOI
 
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21 Publications

Mark all

[21]
2025 | Conference Paper | LibreCat-ID: 59804
Jungemann, L., Wintermann, B., Riebler, H., & Plessl, C. (n.d.). FINN-HPC: Closing the Gap for Energy-Efficient Neural Network Inference on FPGAs in HPC. Proceedings of the 15th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies. The International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies 2025 (HEART 2025), Kumamoto, Japan. https://doi.org/10.1145/3728179.3728189
LibreCat | DOI
 
[20]
2025 | Conference Paper | LibreCat-ID: 59816
Pape, G., Wintermann, B., Jungemann, L., Lass, M., Meyer, M., Riebler, H., & Plessl, C. (n.d.). AuroraFlow, an Easy-to-Use, Low-Latency FPGA Communication Solution Demonstrated on Multi-FPGA Neural Network Inference. Proceedings of the 15th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies. The International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies 2025 (HEART 2025) , Kumamoto, Japan.
LibreCat
 
[19]
2024 | Journal Article | LibreCat-ID: 53663 | OA
Bauer, C., Kenter, T., Lass, M., Mazur, L., Meyer, M., Nitsche, H., Riebler, H., Schade, R., Schwarz, M., Winnwa, N., Wiens, A., Wu, X., Plessl, C., & Simon, J. (2024). Noctua 2 Supercomputer. Journal of Large-Scale Research Facilities, 9. https://doi.org/10.17815/jlsrf-8-187
LibreCat | Files available | DOI
 
[18]
2024 | Journal Article | LibreCat-ID: 56604 | OA
Van Hirtum, L., De Causmaecker, P., Goemaere, J., Kenter, T., Riebler, H., Lass, M., & Plessl, C. (2024). A Computation of the Ninth Dedekind Number Using FPGA Supercomputing. ACM Transactions on Reconfigurable Technology and Systems, 17(3), 1–28. https://doi.org/10.1145/3674147
LibreCat | DOI | Download (ext.)
 
[17]
2023 | Preprint | LibreCat-ID: 43439
Van Hirtum, L., De Causmaecker, P., Goemaere, J., Kenter, T., Riebler, H., Lass, M., & Plessl, C. (2023). A computation of D(9) using FPGA Supercomputing. In arXiv:2304.03039.
LibreCat | arXiv
 
[16]
2023 | Book Chapter | LibreCat-ID: 45893 | OA
Hansmeier, T., Kenter, T., Meyer, M., Riebler, H., Platzner, M., & Plessl, C. (2023). Compute Centers I: Heterogeneous Execution Environments. In C.-J. Haake, F. Meyer auf der Heide, M. Platzner, H. Wachsmuth, & H. Wehrheim (Eds.), On-The-Fly Computing -- Individualized IT-services in dynamic markets (Vol. 412, pp. 165–182). Heinz Nixdorf Institut, Universität Paderborn. https://doi.org/10.5281/zenodo.8068642
LibreCat | Files available | DOI
 
[15]
2019 | Journal Article | LibreCat-ID: 7689
Riebler, H., Vaz, G. F., Kenter, T., & Plessl, C. (2019). Transparent Acceleration for Heterogeneous Platforms with Compilation to OpenCL. ACM Trans. Archit. Code Optim. (TACO), 16(2), 14:1–14:26. https://doi.org/10.1145/3319423
LibreCat | Files available | DOI
 
[14]
2019 | Dissertation | LibreCat-ID: 34167
Riebler, H. (2019). Efficient parallel branch-and-bound search on FPGAs using work stealing and instance-specific designs. https://doi.org/10.17619/UNIPB/1-830
LibreCat | DOI
 
[13]
2018 | Conference Paper | LibreCat-ID: 1204
Riebler, H., Vaz, G. F., Kenter, T., & Plessl, C. (2018). Automated Code Acceleration Targeting Heterogeneous OpenCL Devices. Proc. ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP). https://doi.org/10.1145/3178487.3178534
LibreCat | Files available | DOI
 
[12]
2017 | Journal Article | LibreCat-ID: 18
Riebler, H., Lass, M., Mittendorf, R., Löcke, T., & Plessl, C. (2017). Efficient Branch and Bound on FPGAs Using Work Stealing and Instance-Specific Designs. ACM Transactions on Reconfigurable Technology and Systems (TRETS), 10(3), 24:1-24:23. https://doi.org/10.1145/3053687
LibreCat | Files available | DOI
 
[11]
2016 | Conference Paper | LibreCat-ID: 31
Riebler, H., Vaz, G. F., Plessl, C., Trainiti, E. M. G., Durelli, G. C., & Bolchini, C. (2016). Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems. Proc. HiPEAC Workshop on Reonfigurable Computing (WRC).
LibreCat | Files available
 
[10]
2016 | Conference Paper | LibreCat-ID: 138
Riebler, H., Vaz, G. F., Plessl, C., Trainiti, E. M. G., Durelli, G. C., Del Sozzo, E., Santambrogio, M. D., & Bolchini, C. (2016). Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems. Proceedings of International Forum on Research and Technologies for Society and Industry (RTSI), 1–5. https://doi.org/10.1109/RTSI.2016.7740545
LibreCat | Files available | DOI
 
[9]
2016 | Journal Article | LibreCat-ID: 165
Vaz, G. F., Riebler, H., Kenter, T., & Plessl, C. (2016). Potential and Methods for Embedding Dynamic Offloading Decisions into Application Code. Computers and Electrical Engineering, 55, 91–111. https://doi.org/10.1016/j.compeleceng.2016.04.021
LibreCat | Files available | DOI
 
[8]
2016 | Conference Paper | LibreCat-ID: 171
Kenter, T., Vaz, G. F., Riebler, H., & Plessl, C. (2016). Opportunities for deferring application partitioning and accelerator synthesis to runtime (extended abstract). Workshop on Reconfigurable Computing (WRC).
LibreCat | Files available
 
[7]
2015 | Conference Paper | LibreCat-ID: 238
Damschen, M., Riebler, H., Vaz, G. F., & Plessl, C. (2015). Transparent offloading of computational hotspots from binary code to Xeon Phi. Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE), 1078–1083. https://doi.org/10.7873/DATE.2015.1124
LibreCat | Files available | DOI
 
[6]
2014 | Conference Paper | LibreCat-ID: 377
Riebler, H., Kenter, T., Plessl, C., & Sorge, C. (2014). Reconstructing AES Key Schedules from Decayed Memory with FPGAs. Proceedings of Field-Programmable Custom Computing Machines (FCCM), 222–229. https://doi.org/10.1109/FCCM.2014.67
LibreCat | Files available | DOI
 
[5]
2014 | Conference Paper | LibreCat-ID: 1778
C. Durelli, G., Pogliani, M., Miele, A., Plessl, C., Riebler, H., Vaz, G. F., D. Santambrogio, M., & Bolchini, C. (2014). Runtime Resource Management in Heterogeneous System Architectures: The SAVE Approach. Proc. Int. Symp. on Parallel and Distributed Processing with Applications (ISPA), 142–149. https://doi.org/10.1109/ISPA.2014.27
LibreCat | DOI
 
[4]
2014 | Conference Paper | LibreCat-ID: 439
Vaz, G. F., Riebler, H., Kenter, T., & Plessl, C. (2014). Deferring Accelerator Offloading Decisions to Application Runtime. Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 1–8. https://doi.org/10.1109/ReConFig.2014.7032509
LibreCat | Files available | DOI
 
[3]
2013 | Mastersthesis | LibreCat-ID: 521
Riebler, H. (2013). Identifikation und Wiederherstellung von kryptographischen Schlüsseln mit FPGAs. Universität Paderborn.
LibreCat
 
[2]
2013 | Mastersthesis | LibreCat-ID: 10730
Riebler, H. (2013). Identifikation und Wiederherstellung von kryptographischen Schlüsseln mit FPGAs. Paderborn University.
LibreCat
 
[1]
2013 | Conference Paper | LibreCat-ID: 528
Riebler, H., Kenter, T., Sorge, C., & Plessl, C. (2013). FPGA-accelerated Key Search for Cold-Boot Attacks against AES. Proceedings of the International Conference on Field-Programmable Technology (FPT), 386–389. https://doi.org/10.1109/FPT.2013.6718394
LibreCat | Files available | DOI
 
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