Heinrich Riebler

Paderborn Center for Parallel Computing (PC2)
Hochleistungsrechnen
heinrich.riebler@uni-paderborn.de
ID
8961

19 Publications

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[19]
2024 | Journal Article | LibreCat-ID: 53663 | OA
C. Bauer et al., “Noctua 2 Supercomputer,” Journal of large-scale research facilities, vol. 9, 2024, doi: 10.17815/jlsrf-8-187 .
LibreCat | Files available | DOI
 
[18]
2024 | Journal Article | LibreCat-ID: 56604 | OA
L. Van Hirtum et al., “A Computation of the Ninth Dedekind Number Using FPGA Supercomputing,” ACM Transactions on Reconfigurable Technology and Systems, vol. 17, no. 3, pp. 1–28, 2024, doi: 10.1145/3674147.
LibreCat | DOI | Download (ext.)
 
[17]
2023 | Preprint | LibreCat-ID: 43439
L. Van Hirtum et al., “A computation of D(9) using FPGA Supercomputing,” arXiv:2304.03039. 2023.
LibreCat | arXiv
 
[16]
2023 | Book Chapter | LibreCat-ID: 45893 | OA
T. Hansmeier, T. Kenter, M. Meyer, H. Riebler, M. Platzner, and C. Plessl, “Compute Centers I: Heterogeneous Execution Environments,” in On-The-Fly Computing -- Individualized IT-services in dynamic markets, vol. 412, C.-J. Haake, F. Meyer auf der Heide, M. Platzner, H. Wachsmuth, and H. Wehrheim, Eds. Paderborn: Heinz Nixdorf Institut, Universität Paderborn, 2023, pp. 165–182.
LibreCat | Files available | DOI
 
[15]
2019 | Journal Article | LibreCat-ID: 7689
H. Riebler, G. F. Vaz, T. Kenter, and C. Plessl, “Transparent Acceleration for Heterogeneous Platforms with Compilation to OpenCL,” ACM Trans. Archit. Code Optim. (TACO), vol. 16, no. 2, pp. 14:1–14:26, 2019.
LibreCat | Files available | DOI
 
[14]
2019 | Dissertation | LibreCat-ID: 34167
H. Riebler, Efficient parallel branch-and-bound search on FPGAs using work stealing and instance-specific designs. 2019.
LibreCat | DOI
 
[13]
2018 | Conference Paper | LibreCat-ID: 1204
H. Riebler, G. F. Vaz, T. Kenter, and C. Plessl, “Automated Code Acceleration Targeting Heterogeneous OpenCL Devices,” 2018, doi: 10.1145/3178487.3178534.
LibreCat | Files available | DOI
 
[12]
2017 | Journal Article | LibreCat-ID: 18
H. Riebler, M. Lass, R. Mittendorf, T. Löcke, and C. Plessl, “Efficient Branch and Bound on FPGAs Using Work Stealing and Instance-Specific Designs,” ACM Transactions on Reconfigurable Technology and Systems (TRETS), vol. 10, no. 3, p. 24:1-24:23, 2017, doi: 10.1145/3053687.
LibreCat | Files available | DOI
 
[11]
2016 | Conference Paper | LibreCat-ID: 31
H. Riebler, G. F. Vaz, C. Plessl, E. M. G. Trainiti, G. C. Durelli, and C. Bolchini, “Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems,” 2016.
LibreCat | Files available
 
[10]
2016 | Conference Paper | LibreCat-ID: 138
H. Riebler et al., “Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems,” in Proceedings of International Forum on Research and Technologies for Society and Industry (RTSI), 2016, pp. 1–5, doi: 10.1109/RTSI.2016.7740545.
LibreCat | Files available | DOI
 
[9]
2016 | Journal Article | LibreCat-ID: 165
G. F. Vaz, H. Riebler, T. Kenter, and C. Plessl, “Potential and Methods for Embedding Dynamic Offloading Decisions into Application Code,” Computers and Electrical Engineering, vol. 55, pp. 91–111, 2016, doi: 10.1016/j.compeleceng.2016.04.021.
LibreCat | Files available | DOI
 
[8]
2016 | Conference Paper | LibreCat-ID: 171
T. Kenter, G. F. Vaz, H. Riebler, and C. Plessl, “Opportunities for deferring application partitioning and accelerator synthesis to runtime (extended abstract),” 2016.
LibreCat | Files available
 
[7]
2015 | Conference Paper | LibreCat-ID: 238
M. Damschen, H. Riebler, G. F. Vaz, and C. Plessl, “Transparent offloading of computational hotspots from binary code to Xeon Phi,” in Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE), 2015, pp. 1078–1083, doi: 10.7873/DATE.2015.1124.
LibreCat | Files available | DOI
 
[6]
2014 | Conference Paper | LibreCat-ID: 377
H. Riebler, T. Kenter, C. Plessl, and C. Sorge, “Reconstructing AES Key Schedules from Decayed Memory with FPGAs,” in Proceedings of Field-Programmable Custom Computing Machines (FCCM), 2014, pp. 222–229, doi: 10.1109/FCCM.2014.67.
LibreCat | Files available | DOI
 
[5]
2014 | Conference Paper | LibreCat-ID: 1778
G. C. Durelli et al., “Runtime Resource Management in Heterogeneous System Architectures: The SAVE Approach,” in Proc. Int. Symp. on Parallel and Distributed Processing with Applications (ISPA), 2014, pp. 142–149, doi: 10.1109/ISPA.2014.27.
LibreCat | DOI
 
[4]
2014 | Conference Paper | LibreCat-ID: 439
G. F. Vaz, H. Riebler, T. Kenter, and C. Plessl, “Deferring Accelerator Offloading Decisions to Application Runtime,” in Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2014, pp. 1–8, doi: 10.1109/ReConFig.2014.7032509.
LibreCat | Files available | DOI
 
[3]
2013 | Mastersthesis | LibreCat-ID: 521
H. Riebler, Identifikation und Wiederherstellung von kryptographischen Schlüsseln mit FPGAs. Universität Paderborn, 2013.
LibreCat
 
[2]
2013 | Mastersthesis | LibreCat-ID: 10730
H. Riebler, Identifikation und Wiederherstellung von kryptographischen Schlüsseln mit FPGAs. Paderborn University, 2013.
LibreCat
 
[1]
2013 | Conference Paper | LibreCat-ID: 528
H. Riebler, T. Kenter, C. Sorge, and C. Plessl, “FPGA-accelerated Key Search for Cold-Boot Attacks against AES,” in Proceedings of the International Conference on Field-Programmable Technology (FPT), 2013, pp. 386–389, doi: 10.1109/FPT.2013.6718394.
LibreCat | Files available | DOI
 
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19 Publications

Mark all

[19]
2024 | Journal Article | LibreCat-ID: 53663 | OA
C. Bauer et al., “Noctua 2 Supercomputer,” Journal of large-scale research facilities, vol. 9, 2024, doi: 10.17815/jlsrf-8-187 .
LibreCat | Files available | DOI
 
[18]
2024 | Journal Article | LibreCat-ID: 56604 | OA
L. Van Hirtum et al., “A Computation of the Ninth Dedekind Number Using FPGA Supercomputing,” ACM Transactions on Reconfigurable Technology and Systems, vol. 17, no. 3, pp. 1–28, 2024, doi: 10.1145/3674147.
LibreCat | DOI | Download (ext.)
 
[17]
2023 | Preprint | LibreCat-ID: 43439
L. Van Hirtum et al., “A computation of D(9) using FPGA Supercomputing,” arXiv:2304.03039. 2023.
LibreCat | arXiv
 
[16]
2023 | Book Chapter | LibreCat-ID: 45893 | OA
T. Hansmeier, T. Kenter, M. Meyer, H. Riebler, M. Platzner, and C. Plessl, “Compute Centers I: Heterogeneous Execution Environments,” in On-The-Fly Computing -- Individualized IT-services in dynamic markets, vol. 412, C.-J. Haake, F. Meyer auf der Heide, M. Platzner, H. Wachsmuth, and H. Wehrheim, Eds. Paderborn: Heinz Nixdorf Institut, Universität Paderborn, 2023, pp. 165–182.
LibreCat | Files available | DOI
 
[15]
2019 | Journal Article | LibreCat-ID: 7689
H. Riebler, G. F. Vaz, T. Kenter, and C. Plessl, “Transparent Acceleration for Heterogeneous Platforms with Compilation to OpenCL,” ACM Trans. Archit. Code Optim. (TACO), vol. 16, no. 2, pp. 14:1–14:26, 2019.
LibreCat | Files available | DOI
 
[14]
2019 | Dissertation | LibreCat-ID: 34167
H. Riebler, Efficient parallel branch-and-bound search on FPGAs using work stealing and instance-specific designs. 2019.
LibreCat | DOI
 
[13]
2018 | Conference Paper | LibreCat-ID: 1204
H. Riebler, G. F. Vaz, T. Kenter, and C. Plessl, “Automated Code Acceleration Targeting Heterogeneous OpenCL Devices,” 2018, doi: 10.1145/3178487.3178534.
LibreCat | Files available | DOI
 
[12]
2017 | Journal Article | LibreCat-ID: 18
H. Riebler, M. Lass, R. Mittendorf, T. Löcke, and C. Plessl, “Efficient Branch and Bound on FPGAs Using Work Stealing and Instance-Specific Designs,” ACM Transactions on Reconfigurable Technology and Systems (TRETS), vol. 10, no. 3, p. 24:1-24:23, 2017, doi: 10.1145/3053687.
LibreCat | Files available | DOI
 
[11]
2016 | Conference Paper | LibreCat-ID: 31
H. Riebler, G. F. Vaz, C. Plessl, E. M. G. Trainiti, G. C. Durelli, and C. Bolchini, “Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems,” 2016.
LibreCat | Files available
 
[10]
2016 | Conference Paper | LibreCat-ID: 138
H. Riebler et al., “Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems,” in Proceedings of International Forum on Research and Technologies for Society and Industry (RTSI), 2016, pp. 1–5, doi: 10.1109/RTSI.2016.7740545.
LibreCat | Files available | DOI
 
[9]
2016 | Journal Article | LibreCat-ID: 165
G. F. Vaz, H. Riebler, T. Kenter, and C. Plessl, “Potential and Methods for Embedding Dynamic Offloading Decisions into Application Code,” Computers and Electrical Engineering, vol. 55, pp. 91–111, 2016, doi: 10.1016/j.compeleceng.2016.04.021.
LibreCat | Files available | DOI
 
[8]
2016 | Conference Paper | LibreCat-ID: 171
T. Kenter, G. F. Vaz, H. Riebler, and C. Plessl, “Opportunities for deferring application partitioning and accelerator synthesis to runtime (extended abstract),” 2016.
LibreCat | Files available
 
[7]
2015 | Conference Paper | LibreCat-ID: 238
M. Damschen, H. Riebler, G. F. Vaz, and C. Plessl, “Transparent offloading of computational hotspots from binary code to Xeon Phi,” in Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE), 2015, pp. 1078–1083, doi: 10.7873/DATE.2015.1124.
LibreCat | Files available | DOI
 
[6]
2014 | Conference Paper | LibreCat-ID: 377
H. Riebler, T. Kenter, C. Plessl, and C. Sorge, “Reconstructing AES Key Schedules from Decayed Memory with FPGAs,” in Proceedings of Field-Programmable Custom Computing Machines (FCCM), 2014, pp. 222–229, doi: 10.1109/FCCM.2014.67.
LibreCat | Files available | DOI
 
[5]
2014 | Conference Paper | LibreCat-ID: 1778
G. C. Durelli et al., “Runtime Resource Management in Heterogeneous System Architectures: The SAVE Approach,” in Proc. Int. Symp. on Parallel and Distributed Processing with Applications (ISPA), 2014, pp. 142–149, doi: 10.1109/ISPA.2014.27.
LibreCat | DOI
 
[4]
2014 | Conference Paper | LibreCat-ID: 439
G. F. Vaz, H. Riebler, T. Kenter, and C. Plessl, “Deferring Accelerator Offloading Decisions to Application Runtime,” in Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2014, pp. 1–8, doi: 10.1109/ReConFig.2014.7032509.
LibreCat | Files available | DOI
 
[3]
2013 | Mastersthesis | LibreCat-ID: 521
H. Riebler, Identifikation und Wiederherstellung von kryptographischen Schlüsseln mit FPGAs. Universität Paderborn, 2013.
LibreCat
 
[2]
2013 | Mastersthesis | LibreCat-ID: 10730
H. Riebler, Identifikation und Wiederherstellung von kryptographischen Schlüsseln mit FPGAs. Paderborn University, 2013.
LibreCat
 
[1]
2013 | Conference Paper | LibreCat-ID: 528
H. Riebler, T. Kenter, C. Sorge, and C. Plessl, “FPGA-accelerated Key Search for Cold-Boot Attacks against AES,” in Proceedings of the International Conference on Field-Programmable Technology (FPT), 2013, pp. 386–389, doi: 10.1109/FPT.2013.6718394.
LibreCat | Files available | DOI
 
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Search

Filter Publications

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Citation Style: IEEE

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