9 Publications
2025 | Journal Article | LibreCat-ID: 62148
Sadiye, B., Iftekhar, M., Müller, W., & Scheytt, J. C. (2025). 60-Gb/s 1:4 Demultiplexer in 22-nm FD-SOI Technology Using TSPC Logic: A Circuit-to-System-Level Analysis and Design. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. https://doi.org/10.1109/TVLSI.2025.3625787
LibreCat
| DOI
2025 | Conference Paper | LibreCat-ID: 62126
Iftekhar, M., Sadiye, B., Müller, W., & Scheytt, J. C. (2025). A 50 Gbps Reference-less NRZ Full-rate Bang-Bang CDR with Automatic Frequency Acquisition in 130 nm SiGe:C BiCMOS Technology. IEEE Nordic Circuits and Systems Conference (NORCAS). IEEE Nordic Circuits and Systems Conference (NORCAS), Riga, Latvia. https://doi.org/10.1109/NorCAS66540.2025.11231203
LibreCat
| DOI
2025 | Journal Article | LibreCat-ID: 62644
Schwabe, T., Kress, C., Sadiye, B., Kruse, S., & Scheytt, J. C. (2025). Analysis and Design of Forward Biased Silicon Photonics Phase Shifter Equalizer Circuits. IEEE Access, 13, 192433–192450. https://doi.org/10.1109/ACCESS.2025.3629385
LibreCat
| DOI
2024 | Conference Paper | LibreCat-ID: 53579
Palomero Bernardo, P., Schmid, P., Bringmann, O., Iftekhar, M., Sadiye, B., Müller, W., Koch, A., Jentsch, E., Sauer, A., Feldner, I., & Ecker, W. (2024). A Scalable RISC-V Hardware Platform for Intelligent Sensor Processing. DATE 24 - Design Automation and Test in Europe.
LibreCat
2024 | Conference Paper | LibreCat-ID: 45778
Luchterhandt, L., Nellius, T., Beck, R., Dömer, R., Kneuper, P., Müller, W., & Sadiye, B. (2024). Implementation of Different Communication Structures for a Rocket Chip Based RISC-V Grid of Processing Cells. MBMV 2024 - 27. Workshop Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation von Schaltungen Und Systemen“. MBMV 2023 - 26. Workshop, Freiburg, , Germany, Freiburg.
LibreCat
2023 | Conference Paper | LibreCat-ID: 45776
Ecker, W., Krstic, M., Ulbricht, M., Mauderer, A., Jentzsch, E., Koch, A., Koppelmann, B., Müller, W., Sadiye, B., Bruns, N., Drechsler, R., Müller-Gritschneder, D., Schlamelcher, J., Grüttner, K., Bormann, J., Kunz, W., Heckmann, R., Angst, G., Wimmer, R., … Mayr, C. (2023). Scale4Edge – Scaling RISC-V for Edge Applications. RISC-V Summit Europe 2023, Barcelona, Spain, June 2023. RISC-V Summit Europe 2023, Barcelona, Spain, June 2023., Barcelona, Spain,.
LibreCat
| Files available
2023 | Conference Abstract | LibreCat-ID: 48961
Iftekhar, M., Gowda, H., Kneuper, P., Sadiye, B., Müller, W., & Scheytt, C. (2023). A 28-Gb/s 27.2mW NRZ Full-Rate Bang-Bang Clock and Data Recovery in 22 nm FD-SOI CMOS Technology. 2023 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS). 2023 IEEE BiCMOS und Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS), Monterey, CA, USA. https://doi.org/10.1109/BCICTS54660.2023.10310954
LibreCat
| Files available
| DOI
2023 | Conference Paper | LibreCat-ID: 45775
Luchterhandt, L., Nellius, T., Beck, R., Dömer, R., Kneuper, P., Müller, W., & Sadiye, B. (2023). Towards a Rocket Chip Based Implementation of the RISC-V GPC Architecture. MBMV 2023 - 26. Workshop "Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation von Schaltungen Und Systemen“, MBMV 2023, Freiburg. MBMV 2023, Freiburg, Freiburg.
LibreCat
2023 | Conference Abstract | LibreCat-ID: 47064
Iftekhar, M., Nagaraju, H., Kneuper, P., Sadiye, B., Müller, W., & Scheytt, J. C. (2023). A 28-Gb/s 27.2 mW NRZ Full-Rate Bang-Bang Clock and Data Recovery in 22 nm FD-SOI CMOS Technology . BCICTS 2023 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium.
LibreCat
| Files available
9 Publications
2025 | Journal Article | LibreCat-ID: 62148
Sadiye, B., Iftekhar, M., Müller, W., & Scheytt, J. C. (2025). 60-Gb/s 1:4 Demultiplexer in 22-nm FD-SOI Technology Using TSPC Logic: A Circuit-to-System-Level Analysis and Design. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. https://doi.org/10.1109/TVLSI.2025.3625787
LibreCat
| DOI
2025 | Conference Paper | LibreCat-ID: 62126
Iftekhar, M., Sadiye, B., Müller, W., & Scheytt, J. C. (2025). A 50 Gbps Reference-less NRZ Full-rate Bang-Bang CDR with Automatic Frequency Acquisition in 130 nm SiGe:C BiCMOS Technology. IEEE Nordic Circuits and Systems Conference (NORCAS). IEEE Nordic Circuits and Systems Conference (NORCAS), Riga, Latvia. https://doi.org/10.1109/NorCAS66540.2025.11231203
LibreCat
| DOI
2025 | Journal Article | LibreCat-ID: 62644
Schwabe, T., Kress, C., Sadiye, B., Kruse, S., & Scheytt, J. C. (2025). Analysis and Design of Forward Biased Silicon Photonics Phase Shifter Equalizer Circuits. IEEE Access, 13, 192433–192450. https://doi.org/10.1109/ACCESS.2025.3629385
LibreCat
| DOI
2024 | Conference Paper | LibreCat-ID: 53579
Palomero Bernardo, P., Schmid, P., Bringmann, O., Iftekhar, M., Sadiye, B., Müller, W., Koch, A., Jentsch, E., Sauer, A., Feldner, I., & Ecker, W. (2024). A Scalable RISC-V Hardware Platform for Intelligent Sensor Processing. DATE 24 - Design Automation and Test in Europe.
LibreCat
2024 | Conference Paper | LibreCat-ID: 45778
Luchterhandt, L., Nellius, T., Beck, R., Dömer, R., Kneuper, P., Müller, W., & Sadiye, B. (2024). Implementation of Different Communication Structures for a Rocket Chip Based RISC-V Grid of Processing Cells. MBMV 2024 - 27. Workshop Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation von Schaltungen Und Systemen“. MBMV 2023 - 26. Workshop, Freiburg, , Germany, Freiburg.
LibreCat
2023 | Conference Paper | LibreCat-ID: 45776
Ecker, W., Krstic, M., Ulbricht, M., Mauderer, A., Jentzsch, E., Koch, A., Koppelmann, B., Müller, W., Sadiye, B., Bruns, N., Drechsler, R., Müller-Gritschneder, D., Schlamelcher, J., Grüttner, K., Bormann, J., Kunz, W., Heckmann, R., Angst, G., Wimmer, R., … Mayr, C. (2023). Scale4Edge – Scaling RISC-V for Edge Applications. RISC-V Summit Europe 2023, Barcelona, Spain, June 2023. RISC-V Summit Europe 2023, Barcelona, Spain, June 2023., Barcelona, Spain,.
LibreCat
| Files available
2023 | Conference Abstract | LibreCat-ID: 48961
Iftekhar, M., Gowda, H., Kneuper, P., Sadiye, B., Müller, W., & Scheytt, C. (2023). A 28-Gb/s 27.2mW NRZ Full-Rate Bang-Bang Clock and Data Recovery in 22 nm FD-SOI CMOS Technology. 2023 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS). 2023 IEEE BiCMOS und Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS), Monterey, CA, USA. https://doi.org/10.1109/BCICTS54660.2023.10310954
LibreCat
| Files available
| DOI
2023 | Conference Paper | LibreCat-ID: 45775
Luchterhandt, L., Nellius, T., Beck, R., Dömer, R., Kneuper, P., Müller, W., & Sadiye, B. (2023). Towards a Rocket Chip Based Implementation of the RISC-V GPC Architecture. MBMV 2023 - 26. Workshop "Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation von Schaltungen Und Systemen“, MBMV 2023, Freiburg. MBMV 2023, Freiburg, Freiburg.
LibreCat
2023 | Conference Abstract | LibreCat-ID: 47064
Iftekhar, M., Nagaraju, H., Kneuper, P., Sadiye, B., Müller, W., & Scheytt, J. C. (2023). A 28-Gb/s 27.2 mW NRZ Full-Rate Bang-Bang Clock and Data Recovery in 22 nm FD-SOI CMOS Technology . BCICTS 2023 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium.
LibreCat
| Files available