5 Publications
2024 | Conference Paper | LibreCat-ID: 45778
Luchterhandt, Lars, Tom Nellius, Robert Beck, Rainer Dömer, Pascal Kneuper, Wolfgang Müller, and Babak Sadiye. “Implementation of Different Communication Structures for a Rocket Chip Based RISC-V Grid of Processing Cells.” In MBMV 2024 - 27. Workshop Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation von Schaltungen Und Systemen“. VDE Verlag, 2024.
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2024 | Conference Paper | LibreCat-ID: 53579
Palomero Bernardo, Paul, Patrick Schmid, Oliver Bringmann, Mohammed Iftekhar, Babak Sadiye, Wolfgang Müller, Andreas Koch, et al. “A Scalable RISC-V Hardware Platform for Intelligent Sensor Processing.” In DATE 24 - Design Automation and Test in Europe, 2024.
LibreCat
2023 | Conference Paper | LibreCat-ID: 45775
Luchterhandt, Lars, Tom Nellius, Robert Beck, Rainer Dömer, Pascal Kneuper, Wolfgang Müller, and Babak Sadiye. “Towards a Rocket Chip Based Implementation of the RISC-V GPC Architecture.” In MBMV 2023 - 26. Workshop "Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation von Schaltungen Und Systemen“, MBMV 2023, Freiburg. VDE Verlag, 2023.
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2023 | Conference Paper | LibreCat-ID: 45776
Ecker, Wolfgang, Milos Krstic, Markus Ulbricht, Andreas Mauderer, Eyck Jentzsch, Andreas Koch, Bastian Koppelmann, et al. “Scale4Edge – Scaling RISC-V for Edge Applications.” In RISC-V Summit Europe 2023, Barcelona, Spain, June 2023., 2023.
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2023 | Conference Abstract | LibreCat-ID: 48961
Iftekhar, Mohammed, Harshan Gowda, Pascal Kneuper, Babak Sadiye, Wolfgang Müller, and Christoph Scheytt. “A 28-Gb/s 27.2mW NRZ Full-Rate Bang-Bang Clock and Data Recovery in 22 Nm FD-SOI CMOS Technology.” In 2023 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS), 2023. https://doi.org/10.1109/BCICTS54660.2023.10310954.
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5 Publications
2024 | Conference Paper | LibreCat-ID: 45778
Luchterhandt, Lars, Tom Nellius, Robert Beck, Rainer Dömer, Pascal Kneuper, Wolfgang Müller, and Babak Sadiye. “Implementation of Different Communication Structures for a Rocket Chip Based RISC-V Grid of Processing Cells.” In MBMV 2024 - 27. Workshop Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation von Schaltungen Und Systemen“. VDE Verlag, 2024.
LibreCat
| Files available
2024 | Conference Paper | LibreCat-ID: 53579
Palomero Bernardo, Paul, Patrick Schmid, Oliver Bringmann, Mohammed Iftekhar, Babak Sadiye, Wolfgang Müller, Andreas Koch, et al. “A Scalable RISC-V Hardware Platform for Intelligent Sensor Processing.” In DATE 24 - Design Automation and Test in Europe, 2024.
LibreCat
2023 | Conference Paper | LibreCat-ID: 45775
Luchterhandt, Lars, Tom Nellius, Robert Beck, Rainer Dömer, Pascal Kneuper, Wolfgang Müller, and Babak Sadiye. “Towards a Rocket Chip Based Implementation of the RISC-V GPC Architecture.” In MBMV 2023 - 26. Workshop "Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation von Schaltungen Und Systemen“, MBMV 2023, Freiburg. VDE Verlag, 2023.
LibreCat
| Files available
2023 | Conference Paper | LibreCat-ID: 45776
Ecker, Wolfgang, Milos Krstic, Markus Ulbricht, Andreas Mauderer, Eyck Jentzsch, Andreas Koch, Bastian Koppelmann, et al. “Scale4Edge – Scaling RISC-V for Edge Applications.” In RISC-V Summit Europe 2023, Barcelona, Spain, June 2023., 2023.
LibreCat
| Files available
2023 | Conference Abstract | LibreCat-ID: 48961
Iftekhar, Mohammed, Harshan Gowda, Pascal Kneuper, Babak Sadiye, Wolfgang Müller, and Christoph Scheytt. “A 28-Gb/s 27.2mW NRZ Full-Rate Bang-Bang Clock and Data Recovery in 22 Nm FD-SOI CMOS Technology.” In 2023 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS), 2023. https://doi.org/10.1109/BCICTS54660.2023.10310954.
LibreCat
| Files available
| DOI