9 Publications
2025 | Journal Article | LibreCat-ID: 62148
B. Sadiye, M. Iftekhar, W. Müller, and J. C. Scheytt, “60-Gb/s 1:4 Demultiplexer in 22-nm FD-SOI Technology Using TSPC Logic: A Circuit-to-System-Level Analysis and Design,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2025, doi: 10.1109/TVLSI.2025.3625787.
LibreCat
| DOI
2025 | Conference Paper | LibreCat-ID: 62126
M. Iftekhar, B. Sadiye, W. Müller, and J. C. Scheytt, “A 50 Gbps Reference-less NRZ Full-rate Bang-Bang CDR with Automatic Frequency Acquisition in 130 nm SiGe:C BiCMOS Technology,” presented at the IEEE Nordic Circuits and Systems Conference (NORCAS), Riga, Latvia, 2025, doi: 10.1109/NorCAS66540.2025.11231203.
LibreCat
| DOI
2025 | Journal Article | LibreCat-ID: 62644
T. Schwabe, C. Kress, B. Sadiye, S. Kruse, and J. C. Scheytt, “Analysis and Design of Forward Biased Silicon Photonics Phase Shifter Equalizer Circuits,” IEEE Access, vol. 13, pp. 192433–192450, 2025, doi: 10.1109/ACCESS.2025.3629385.
LibreCat
| DOI
2024 | Conference Paper | LibreCat-ID: 53579
P. Palomero Bernardo et al., “A Scalable RISC-V Hardware Platform for Intelligent Sensor Processing,” Valencia, Spain, 2024.
LibreCat
2024 | Conference Paper | LibreCat-ID: 45778
L. Luchterhandt et al., “Implementation of Different Communication Structures for a Rocket Chip Based RISC-V Grid of Processing Cells,” presented at the MBMV 2023 - 26. Workshop, Freiburg, , Germany, Freiburg, 2024.
LibreCat
2023 | Conference Paper | LibreCat-ID: 45776
W. Ecker et al., “Scale4Edge – Scaling RISC-V for Edge Applications,” presented at the RISC-V Summit Europe 2023, Barcelona, Spain, June 2023., Barcelona, Spain, 2023.
LibreCat
| Files available
2023 | Conference Abstract | LibreCat-ID: 48961
M. Iftekhar, H. Gowda, P. Kneuper, B. Sadiye, W. Müller, and C. Scheytt, “A 28-Gb/s 27.2mW NRZ Full-Rate Bang-Bang Clock and Data Recovery in 22 nm FD-SOI CMOS Technology,” presented at the 2023 IEEE BiCMOS und Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS), Monterey, CA, USA, 2023, doi: 10.1109/BCICTS54660.2023.10310954.
LibreCat
| Files available
| DOI
2023 | Conference Paper | LibreCat-ID: 45775
L. Luchterhandt et al., “Towards a Rocket Chip Based Implementation of the RISC-V GPC Architecture,” presented at the MBMV 2023, Freiburg, Freiburg, 2023.
LibreCat
2023 | Conference Abstract | LibreCat-ID: 47064
M. Iftekhar, H. Nagaraju, P. Kneuper, B. Sadiye, W. Müller, and J. C. Scheytt, “A 28-Gb/s 27.2 mW NRZ Full-Rate Bang-Bang Clock and Data Recovery in 22 nm FD-SOI CMOS Technology ,” MONTEREY, CALIFORNIA, USA, 2023.
LibreCat
| Files available
9 Publications
2025 | Journal Article | LibreCat-ID: 62148
B. Sadiye, M. Iftekhar, W. Müller, and J. C. Scheytt, “60-Gb/s 1:4 Demultiplexer in 22-nm FD-SOI Technology Using TSPC Logic: A Circuit-to-System-Level Analysis and Design,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2025, doi: 10.1109/TVLSI.2025.3625787.
LibreCat
| DOI
2025 | Conference Paper | LibreCat-ID: 62126
M. Iftekhar, B. Sadiye, W. Müller, and J. C. Scheytt, “A 50 Gbps Reference-less NRZ Full-rate Bang-Bang CDR with Automatic Frequency Acquisition in 130 nm SiGe:C BiCMOS Technology,” presented at the IEEE Nordic Circuits and Systems Conference (NORCAS), Riga, Latvia, 2025, doi: 10.1109/NorCAS66540.2025.11231203.
LibreCat
| DOI
2025 | Journal Article | LibreCat-ID: 62644
T. Schwabe, C. Kress, B. Sadiye, S. Kruse, and J. C. Scheytt, “Analysis and Design of Forward Biased Silicon Photonics Phase Shifter Equalizer Circuits,” IEEE Access, vol. 13, pp. 192433–192450, 2025, doi: 10.1109/ACCESS.2025.3629385.
LibreCat
| DOI
2024 | Conference Paper | LibreCat-ID: 53579
P. Palomero Bernardo et al., “A Scalable RISC-V Hardware Platform for Intelligent Sensor Processing,” Valencia, Spain, 2024.
LibreCat
2024 | Conference Paper | LibreCat-ID: 45778
L. Luchterhandt et al., “Implementation of Different Communication Structures for a Rocket Chip Based RISC-V Grid of Processing Cells,” presented at the MBMV 2023 - 26. Workshop, Freiburg, , Germany, Freiburg, 2024.
LibreCat
2023 | Conference Paper | LibreCat-ID: 45776
W. Ecker et al., “Scale4Edge – Scaling RISC-V for Edge Applications,” presented at the RISC-V Summit Europe 2023, Barcelona, Spain, June 2023., Barcelona, Spain, 2023.
LibreCat
| Files available
2023 | Conference Abstract | LibreCat-ID: 48961
M. Iftekhar, H. Gowda, P. Kneuper, B. Sadiye, W. Müller, and C. Scheytt, “A 28-Gb/s 27.2mW NRZ Full-Rate Bang-Bang Clock and Data Recovery in 22 nm FD-SOI CMOS Technology,” presented at the 2023 IEEE BiCMOS und Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS), Monterey, CA, USA, 2023, doi: 10.1109/BCICTS54660.2023.10310954.
LibreCat
| Files available
| DOI
2023 | Conference Paper | LibreCat-ID: 45775
L. Luchterhandt et al., “Towards a Rocket Chip Based Implementation of the RISC-V GPC Architecture,” presented at the MBMV 2023, Freiburg, Freiburg, 2023.
LibreCat
2023 | Conference Abstract | LibreCat-ID: 47064
M. Iftekhar, H. Nagaraju, P. Kneuper, B. Sadiye, W. Müller, and J. C. Scheytt, “A 28-Gb/s 27.2 mW NRZ Full-Rate Bang-Bang Clock and Data Recovery in 22 nm FD-SOI CMOS Technology ,” MONTEREY, CALIFORNIA, USA, 2023.
LibreCat
| Files available