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151 Publications
1995 | Report | LibreCat-ID: 13026
Synthesis Procedures for Self-Testable Controllers
S. Hellebrand, H.-J. Wunderlich, Synthesis Procedures for Self-Testable Controllers, University of Siegen, Germany, 1995.
LibreCat
S. Hellebrand, H.-J. Wunderlich, Synthesis Procedures for Self-Testable Controllers, University of Siegen, Germany, 1995.
1995 | Report | LibreCat-ID: 13027
Evaluation of Self-Testable Controller Architectures Based on Realistic Fault Analysis
S. Hellebrand, H.-J. Wunderlich, F. Goncalves, J. Paulo Teixeira, Evaluation of Self-Testable Controller Architectures Based on Realistic Fault Analysis, University Siegen, Germany, 1995.
LibreCat
S. Hellebrand, H.-J. Wunderlich, F. Goncalves, J. Paulo Teixeira, Evaluation of Self-Testable Controller Architectures Based on Realistic Fault Analysis, University Siegen, Germany, 1995.
1995 | Report | LibreCat-ID: 13028
Partitioning of CMOS-Circuits for On-Chip IDDQ-Testing
S. Hellebrand, M. Herzog, H.-J. Wunderlich, Partitioning of CMOS-Circuits for On-Chip IDDQ-Testing, University of Siegen, Germany, 1995.
LibreCat
S. Hellebrand, M. Herzog, H.-J. Wunderlich, Partitioning of CMOS-Circuits for On-Chip IDDQ-Testing, University of Siegen, Germany, 1995.
1995 | Misc | LibreCat-ID: 13086
Pattern Generation for a Deterministic BIST Scheme
S. Hellebrand, B. Reeb, S. Tarnick, H.-J. Wunderlich, Pattern Generation for a Deterministic BIST Scheme, 2nd IEEE International Test Synthesis Workshop, Santa Barbara, CA, 1995.
LibreCat
S. Hellebrand, B. Reeb, S. Tarnick, H.-J. Wunderlich, Pattern Generation for a Deterministic BIST Scheme, 2nd IEEE International Test Synthesis Workshop, Santa Barbara, CA, 1995.
1995 | Journal Article | LibreCat-ID: 13011
Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers
S. Hellebrand, J. Rajski, S. Tarnick, S. Venkataraman, B. Courtois, IEEE Transactions on Computers 44 (1995) 223–233.
LibreCat
| DOI
S. Hellebrand, J. Rajski, S. Tarnick, S. Venkataraman, B. Courtois, IEEE Transactions on Computers 44 (1995) 223–233.
1995 | Conference Paper | LibreCat-ID: 13012
Pattern Generation for a Deterministic BIST Scheme
S. Hellebrand, B. Reeb, S. Tarnick, H.-J. Wunderlich, in: ACM/IEEE International Conference on Computer Aided Design (ICCAD’95), IEEE, San Jose, CA, USA, 1995, pp. 88–94.
LibreCat
| DOI
S. Hellebrand, B. Reeb, S. Tarnick, H.-J. Wunderlich, in: ACM/IEEE International Conference on Computer Aided Design (ICCAD’95), IEEE, San Jose, CA, USA, 1995, pp. 88–94.
1994 | Report | LibreCat-ID: 13024
Synthesis for Off-line Testability
S. Hellebrand, A. Juergensen, H.-J. Wunderlich, Synthesis for Off-Line Testability, University of Siegen, Germany, 1994.
LibreCat
S. Hellebrand, A. Juergensen, H.-J. Wunderlich, Synthesis for Off-Line Testability, University of Siegen, Germany, 1994.
1994 | Report | LibreCat-ID: 13025
Chip Level Test Planning for Controlling the Tradeoff between Hardware Overhead and Test Time
S. Hellebrand, A. Juergensen, A. Stroele, H.-J. Wunderlich, Chip Level Test Planning for Controlling the Tradeoff between Hardware Overhead and Test Time, University of Siegen, Germany, 1994.
LibreCat
S. Hellebrand, A. Juergensen, A. Stroele, H.-J. Wunderlich, Chip Level Test Planning for Controlling the Tradeoff between Hardware Overhead and Test Time, University of Siegen, Germany, 1994.
1994 | Misc | LibreCat-ID: 13083
Effiziente Testsatzkodierung für Prüfpfad-basierte Selbsttestarchitekturen
S. Venkataraman, J. Rajski, S. Hellebrand, S. Tarnick, Effiziente Testsatzkodierung Für Prüfpfad-Basierte Selbsttestarchitekturen, 6th ITG/GI/GME Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”, Vaals, The Netherlands, 1994.
LibreCat
S. Venkataraman, J. Rajski, S. Hellebrand, S. Tarnick, Effiziente Testsatzkodierung Für Prüfpfad-Basierte Selbsttestarchitekturen, 6th ITG/GI/GME Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”, Vaals, The Netherlands, 1994.
1994 | Misc | LibreCat-ID: 13084
Ein Verfahren zur testfreundlichen Steuerwerkssynthese
S. Hellebrand, H.-J. Wunderlich, Ein Verfahren Zur Testfreundlichen Steuerwerkssynthese, 6th ITG/GI/GME Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”, Vaals, The Netherlands, 1994.
LibreCat
S. Hellebrand, H.-J. Wunderlich, Ein Verfahren Zur Testfreundlichen Steuerwerkssynthese, 6th ITG/GI/GME Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”, Vaals, The Netherlands, 1994.
1994 | Misc | LibreCat-ID: 13085
Synthesis for Testability - the ARCHIMEDES Approach
S. Hellebrand, J. Paulo Teixeira, H.-J. Wunderlich, Synthesis for Testability - the ARCHIMEDES Approach, 1st IEEE International Test Synthesis Workshop, Santa Barbara, CA, USA, 1994.
LibreCat
S. Hellebrand, J. Paulo Teixeira, H.-J. Wunderlich, Synthesis for Testability - the ARCHIMEDES Approach, 1st IEEE International Test Synthesis Workshop, Santa Barbara, CA, USA, 1994.
1994 | Conference Paper | LibreCat-ID: 13014
An Efficient Procedure for the Synthesis of Fast Self-Testable Controller Structures
S. Hellebrand, H.-J. Wunderlich, in: ACM/IEEE International Conference on Computer-Aided Design (ICCAD’94), IEEE, San Jose, CA, USA, 1994, pp. 110–116.
LibreCat
| DOI
S. Hellebrand, H.-J. Wunderlich, in: ACM/IEEE International Conference on Computer-Aided Design (ICCAD’94), IEEE, San Jose, CA, USA, 1994, pp. 110–116.
1994 | Conference Paper | LibreCat-ID: 13059
Synthese schneller selbsttestbarer Steuerwerke
S. Hellebrand, H.-J. Wunderlich, in: Tagungsband Der GI/GME/ITG-Fachtagung \& Rechnergestützter Entwurf Und Architektur Mikroelektronischer Systeme, Oberwiesenthal, Informatik Xpress 4, TU Chemnitz Zwickau, Germany, 1994, pp. 3–11.
LibreCat
S. Hellebrand, H.-J. Wunderlich, in: Tagungsband Der GI/GME/ITG-Fachtagung \& Rechnergestützter Entwurf Und Architektur Mikroelektronischer Systeme, Oberwiesenthal, Informatik Xpress 4, TU Chemnitz Zwickau, Germany, 1994, pp. 3–11.
1994 | Conference Paper | LibreCat-ID: 13013
Synthesis of Self-Testable Controllers
S. Hellebrand, H.-J. Wunderlich, in: European Design and Test Conference (EDAC/ETC/EUROASIC), Paris, France, 1994, pp. 580–585.
LibreCat
| DOI
S. Hellebrand, H.-J. Wunderlich, in: European Design and Test Conference (EDAC/ETC/EUROASIC), Paris, France, 1994, pp. 580–585.
1993 | Misc | LibreCat-ID: 13081
Effiziente Erzeugung deterministischer Muster im Selbsttest
S. Hellebrand, S. Tarnick, J. Rajski, B. Courtois, Effiziente Erzeugung Deterministischer Muster Im Selbsttest, 5th ITG/GI/GME Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”, Holzhau, Germany, 1993.
LibreCat
S. Hellebrand, S. Tarnick, J. Rajski, B. Courtois, Effiziente Erzeugung Deterministischer Muster Im Selbsttest, 5th ITG/GI/GME Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”, Holzhau, Germany, 1993.
1993 | Misc | LibreCat-ID: 13082
Synthesis of Self-Testable Controllers
S. Hellebrand, H.-J. Wunderlich, Synthesis of Self-Testable Controllers, ARCHIMEDES Open Workshop on “Synthesis - Architectural Testability Support”, Montpellier, France, 1993.
LibreCat
S. Hellebrand, H.-J. Wunderlich, Synthesis of Self-Testable Controllers, ARCHIMEDES Open Workshop on “Synthesis - Architectural Testability Support”, Montpellier, France, 1993.
1993 | Conference Paper | LibreCat-ID: 13015
An Efficient Bist Scheme Based On Reseeding Of Multiple Polynomial Linear Feedback Shift Registers
S. Venkataraman, J. Rajski, S. Hellebrand, S. Tarnick, in: ACM/IEEE International Conference on Computer Aided Design (ICCAD’93), IEEE, 1993.
LibreCat
| DOI
S. Venkataraman, J. Rajski, S. Hellebrand, S. Tarnick, in: ACM/IEEE International Conference on Computer Aided Design (ICCAD’93), IEEE, 1993.
1992 | Report | LibreCat-ID: 13023
Generation of Vector Patterns through Reseeding of Multiple-Polynomial LFSRs
S. Hellebrand, S. Tarnick, J. Rajski, B. Courtois, Generation of Vector Patterns through Reseeding of Multiple-Polynomial LFSRs, Institut National Polytechnique de Grenoble, Grenoble, France, 1992.
LibreCat
S. Hellebrand, S. Tarnick, J. Rajski, B. Courtois, Generation of Vector Patterns through Reseeding of Multiple-Polynomial LFSRs, Institut National Polytechnique de Grenoble, Grenoble, France, 1992.
1992 | Misc | LibreCat-ID: 13076
Generation of Vector Patterns through Reseeding of Multiple-Polynomial LFSRs
S. Hellebrand, S. Tarnick, J. Rajski, B. Courtois, Generation of Vector Patterns through Reseeding of Multiple-Polynomial LFSRs, IEEE Design for Testability Workshop, Vail, CO, USA, 1992.
LibreCat
S. Hellebrand, S. Tarnick, J. Rajski, B. Courtois, Generation of Vector Patterns through Reseeding of Multiple-Polynomial LFSRs, IEEE Design for Testability Workshop, Vail, CO, USA, 1992.
1992 | Misc | LibreCat-ID: 13080
Generation of Vector Patterns through Reseeding of Multiple-Polynomial LFSRs
S. Hellebrand, S. Tarnick, J. Rajski, B. Courtois, Generation of Vector Patterns through Reseeding of Multiple-Polynomial LFSRs, Workshop on New Directions for Testing, Montreal, Canada, 1992.
LibreCat
S. Hellebrand, S. Tarnick, J. Rajski, B. Courtois, Generation of Vector Patterns through Reseeding of Multiple-Polynomial LFSRs, Workshop on New Directions for Testing, Montreal, Canada, 1992.