Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers
S. Hellebrand, J. Rajski, S. Tarnick, S. Venkataraman, B. Courtois, IEEE Transactions on Computers 44 (1995) 223–233.
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Journal Article
| English
Author
Hellebrand, SybilleLibreCat ;
Rajski, Janusz;
Tarnick, Steffen;
Venkataraman, Srikanth;
Courtois, B.
Department
Publishing Year
Journal Title
IEEE Transactions on Computers
Volume
44
Issue
2
Page
223-233
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Hellebrand S, Rajski J, Tarnick S, Venkataraman S, Courtois B. Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers. IEEE Transactions on Computers. 1995;44(2):223-233. doi:10.1109/12.364534
Hellebrand, S., Rajski, J., Tarnick, S., Venkataraman, S., & Courtois, B. (1995). Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers. IEEE Transactions on Computers, 44(2), 223–233. https://doi.org/10.1109/12.364534
@article{Hellebrand_Rajski_Tarnick_Venkataraman_Courtois_1995, title={Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers}, volume={44}, DOI={10.1109/12.364534}, number={2}, journal={IEEE Transactions on Computers}, publisher={IEEE}, author={Hellebrand, Sybille and Rajski, Janusz and Tarnick, Steffen and Venkataraman, Srikanth and Courtois, B.}, year={1995}, pages={223–233} }
Hellebrand, Sybille, Janusz Rajski, Steffen Tarnick, Srikanth Venkataraman, and B. Courtois. “Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers.” IEEE Transactions on Computers 44, no. 2 (1995): 223–33. https://doi.org/10.1109/12.364534.
S. Hellebrand, J. Rajski, S. Tarnick, S. Venkataraman, and B. Courtois, “Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers,” IEEE Transactions on Computers, vol. 44, no. 2, pp. 223–233, 1995, doi: 10.1109/12.364534.
Hellebrand, Sybille, et al. “Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers.” IEEE Transactions on Computers, vol. 44, no. 2, IEEE, 1995, pp. 223–33, doi:10.1109/12.364534.