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146 Publications


2015 | Conference Paper | LibreCat-ID: 4465
How Do They Find Their Place? A Longitudinal Study of Management Students' Attitudes and Motivations During Their First Year at Business School
T. Jenert, T. Brahm, in: 2015.
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2015 | Mastersthesis | LibreCat-ID: 5413
An LLVM Based Toolchain for Transparent Acceleration of Digital Image Processing Applications using FPGA Overlay Architectures
L. Funke, An LLVM Based Toolchain for Transparent Acceleration of Digital Image Processing Applications Using FPGA Overlay Architectures, Universität Paderborn, 2015.
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2015 | Mastersthesis | LibreCat-ID: 5416
Instance-Specific Computing in Hard- and Software for Faster Solving of Complex Problems
T. Löcke, Instance-Specific Computing in Hard- and Software for Faster Solving of Complex Problems, Universität Paderborn, 2015.
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2015 | Mastersthesis | LibreCat-ID: 5419
Accelerating Programmable Logic Controllers with the use of FPGAs
F. Wallaschek, Accelerating Programmable Logic Controllers with the Use of FPGAs, Universität Paderborn, 2015.
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2015 | Dissertation | LibreCat-ID: 10624
Management and Scheduling of Accelerators for Heterogeneous High-Performance Computing
T. Beisel, Management and Scheduling of Accelerators for Heterogeneous High-Performance Computing, Logos Verlag Berlin GmbH, Berlin, 2015.
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2015 | Journal Article | LibreCat-ID: 296
Exploring Tradeoffs between Specialized Kernels and a Reusable Overlay in a Stereo-Matching Case Study
T. Kenter, H. Schmitz, C. Plessl, International Journal of Reconfigurable Computing (IJRC) 2015 (2015).
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2015 | Conference Paper | LibreCat-ID: 303 | OA
Easy-to-Use On-The-Fly Binary Program Acceleration on Many-Cores
M. Damschen, C. Plessl, in: Proceedings of the 5th International Workshop on Adaptive Self-Tuning Computing Systems (ADAPT), 2015.
LibreCat | Files available | arXiv
 

2015 | Conference Paper | LibreCat-ID: 1773
Improving Packet Processing Performance in the ATLAS FELIX Project – Analysis and Optimization of a Memory-Bounded Algorithm
J. Schumacher, J. T. Anderson, A. Borga, H. Boterenbrood, H. Chen, K. Chen, G. Drake, D. Francis, B. Gorini, F. Lanni, G. Lehmann-Miotto, L. Levinson, J. Narevicius, C. Plessl, A. Roich, S. Ryu, F. P. Schreuder, W. Vandelli, J. Vermeulen, J. Zhang, in: Proc. Int. Conf. on Distributed Event-Based Systems (DEBS), ACM, 2015.
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2015 | Journal Article | LibreCat-ID: 1768
Aktuelles Schlagwort: Approximate Computing
C. Plessl, M. Platzner, P.J. Schreier, Informatik Spektrum (2015) 396–399.
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2015 | Conference Paper | LibreCat-ID: 238
Transparent offloading of computational hotspots from binary code to Xeon Phi
M. Damschen, H. Riebler, G.F. Vaz, C. Plessl, in: Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE), EDA Consortium / IEEE, 2015, pp. 1078–1083.
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2015 | Journal Article | LibreCat-ID: 1775
FELIX: a High-Throughput Network Approach for Interfacing to Front End Electronics for ATLAS Upgrades
J. Anderson, A. Borga, H. Boterenbrood, H. Chen, K. Chen, G. Drake, D. Francis, B. Gorini, F. Lanni, G. Lehmann Miotto, L. Levinson, J. Narevicius, C. Plessl, A. Roich, S. Ryu, F. Schreuder, J. Schumacher, W. Vandelli, J. Vermeulen, J. Zhang, Journal of Physics: Conference Series 664 (2015).
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2014 | Book Chapter | LibreCat-ID: 335
Verschiebungen an der Grenze zwischen Hardware und Software
M. Platzner, C. Plessl, in: J. Künsemöller, N.O. Eke, L. Foit, T. Kaerlein (Eds.), Logiken strukturbildender Prozesse: Automatismen, Wilhelm Fink, Paderborn, 2014, pp. 123–144.
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2014 | Conference Paper | LibreCat-ID: 388
Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer
T. Kenter, G.F. Vaz, C. Plessl, in: Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC), Springer International Publishing, Cham, 2014, pp. 144–155.
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2014 | Journal Article | LibreCat-ID: 363
Seven Recipes for Setting Your FPGA on Fire – A Cookbook on Heat Generators
A. Agne, H. Hangmann, M. Happe, M. Platzner, C. Plessl, Microprocessors and Microsystems 38 (2014) 911–919.
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2014 | Conference Paper | LibreCat-ID: 377
Reconstructing AES Key Schedules from Decayed Memory with FPGAs
H. Riebler, T. Kenter, C. Plessl, C. Sorge, in: Proceedings of Field-Programmable Custom Computing Machines (FCCM), IEEE, 2014, pp. 222–229.
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2014 | Journal Article | LibreCat-ID: 365
Self-awareness as a Model for Designing and Operating Heterogeneous Multicores
A. Agne, M. Happe, A. Lösch, C. Plessl, M. Platzner, ACM Transactions on Reconfigurable Technology and Systems (TRETS) 7 (2014).
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2014 | Journal Article | LibreCat-ID: 328
ReconOS - An Operating System Approach for Reconfigurable Computing
A. Agne, M. Happe, A. Keller, E. Lübbers, B. Plattner, M. Platzner, C. Plessl, IEEE Micro 34 (2014) 60–71.
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2014 | Conference Paper | LibreCat-ID: 1778
Runtime Resource Management in Heterogeneous System Architectures: The SAVE Approach
G. C. Durelli, M. Pogliani, A. Miele, C. Plessl, H. Riebler, G.F. Vaz, M. D. Santambrogio, C. Bolchini, in: Proc. Int. Symp. on Parallel and Distributed Processing with Applications (ISPA), IEEE, 2014, pp. 142–149.
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2014 | Conference Paper | LibreCat-ID: 439
Deferring Accelerator Offloading Decisions to Application Runtime
G.F. Vaz, H. Riebler, T. Kenter, C. Plessl, in: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2014, pp. 1–8.
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2014 | Conference Paper | LibreCat-ID: 406
Kernel-Centric Acceleration of High Accuracy Stereo-Matching
T. Kenter, H. Schmitz, C. Plessl, in: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2014, pp. 1–8.
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2014 | Conference Paper | LibreCat-ID: 1780
SAVE: Towards efficient resource management in heterogeneous system architectures
G. C. Durelli, M. Copolla, K. Djafarian, G. Koranaros, A. Miele, M. Paolino, O. Pell, C. Plessl, M. D. Santambrogio, C. Bolchini, in: Proc. Int. Conf. on Reconfigurable Computing: Architectures, Tools and Applications (ARC), Springer, 2014.
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2014 | Journal Article | LibreCat-ID: 1779
Accelerating Finite Difference Time Domain Simulations with Reconfigurable Dataflow Computers
H. Giefers, C. Plessl, J. Förstner, ACM SIGARCH Computer Architecture News 41 (2014) 65–70.
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2013 | Mastersthesis | LibreCat-ID: 521
Identifikation und Wiederherstellung von kryptographischen Schlüsseln mit FPGAs
H. Riebler, Identifikation und Wiederherstellung von kryptographischen Schlüsseln mit FPGAs, Universität Paderborn, 2013.
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2013 | Conference Paper | LibreCat-ID: 528
FPGA-accelerated Key Search for Cold-Boot Attacks against AES
H. Riebler, T. Kenter, C. Sorge, C. Plessl, in: Proceedings of the International Conference on Field-Programmable Technology (FPT), IEEE, 2013, pp. 386–389.
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2013 | Conference Paper | LibreCat-ID: 505
On-The-Fly Computing: A Novel Paradigm for Individualized IT Services
M. Happe, P. Kling, C. Plessl, M. Platzner, F. Meyer auf der Heide, in: Proceedings of the 9th IEEE Workshop on Software Technology for Future Embedded and Ubiquitous Systems (SEUS), IEEE, 2013.
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2013 | Conference Paper | LibreCat-ID: 1787
Parallel Macro Pipelining on the Intel SCC Many-Core Computer
T. Suess, A. Schoenrock, S. Meisner, C. Plessl, in: Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW), IEEE Computer Society, Washington, DC, USA, 2013, pp. 64–73.
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2012 | Conference Paper | LibreCat-ID: 2107
A Data Driven Science Gateway for Computational Workflows
R. Grunzke, G. Birkenheuer, D. Blunk, S. Breuers, A. Brinkmann, S. Gesing, S. Herres-Pawlis, O. Kohlbacher, J. Krüger, M. Kruse, R. Müller-Pfefferkorn, P. Schäfer, B. Schuller, T. Steinke, A. Zink, in: Proc. UNICORE Summit, 2012.
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2012 | Misc | LibreCat-ID: 587
Programming models for reconfigurable heterogeneous multi-cores
C. Plessl, M. Platzner, A. Agne, M. Happe, E. Lübbers, Programming Models for Reconfigurable Heterogeneous Multi-Cores, Awareness Magazine, 2012.
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2012 | Conference Paper | LibreCat-ID: 2106
Convey Vector Personalities – FPGA Acceleration with an OpenMP-like Effort?
B. Meyer, J. Schumacher, C. Plessl, J. Förstner, in: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), IEEE, 2012, pp. 189–196.
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2012 | Journal Article | LibreCat-ID: 2108
IMORC: An Infrastructure and Architecture Template for Implementing High-Performance Reconfigurable FPGA Accelerators
T. Schumacher, C. Plessl, M. Platzner, Microprocessors and Microsystems 36 (2012) 110–126.
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2012 | Conference Paper | LibreCat-ID: 615
Eight Ways to put your FPGA on Fire – A Systematic Study of Heat Generators
M. Happe, H. Hangmann, A. Agne, C. Plessl, in: Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), IEEE, 2012, pp. 1–8.
LibreCat | Files available | DOI
 

2012 | Conference Paper | LibreCat-ID: 591
Pragma based parallelization - Trading hardware efficiency for ease of use?
T. Kenter, C. Plessl, H. Schmitz, in: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2012, pp. 1–8.
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2012 | Conference Paper | LibreCat-ID: 609
Hardware/Software Platform for Self-aware Compute Nodes
M. Happe, A. Agne, C. Plessl, M. Platzner, in: Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS), 2012, pp. 8–9.
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2012 | Conference Paper | LibreCat-ID: 567
Turning control flow graphs into function calls: Code generation for heterogeneous architectures
P. Barrio, C. Carreras, R. Sierra, T. Kenter, C. Plessl, in: Proceedings of the International Conference on High Performance Computing and Simulation (HPCS), IEEE, 2012, pp. 559–565.
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2012 | Conference Paper | LibreCat-ID: 612
Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs
C. Rüthing, M. Happe, A. Agne, C. Plessl, in: Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2012, pp. 559–562.
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2012 | Conference Paper | LibreCat-ID: 2180
Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux
T. Beisel, T. Wiersema, C. Plessl, A. Brinkmann, in: Proc. Workshop on Computer Architecture and Operating System Co-Design (CAOS), 2012.
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2012 | Journal Article | LibreCat-ID: 2177
On the Feasibility and Limitations of Just-In-Time Instruction Set Extension for FPGA-based Reconfigurable Processors
M. Grad, C. Plessl, Int. Journal of Reconfigurable Computing (IJRC) (2012).
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2011 | Conference Paper | LibreCat-ID: 2191
Estimation and Partitioning for CPU-Accelerator Architectures
T. Kenter, C. Plessl, M. Platzner, M. Kauschke, in: Intel European Research and Innovation Conference, 2011.
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2011 | Book Chapter | LibreCat-ID: 2202
Hardware Virtualization on Dynamically Reconfigurable Embedded Processors
C. Plessl, M. Platzner, in: M. Khalgui, H.-M. Hanisch (Eds.), Reconfigurable Embedded Control Systems: Applications for Flexibility and Agility, IGI Global, Hershey, PA, USA, 2011.
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2011 | Book Chapter | LibreCat-ID: 10737
Evolution of Electronic Circuits
L. Sekanina, J.A. Walker, P. Kaufmann, C. Plessl, M. Platzner, in: Cartesian Genetic Programming, Springer Berlin Heidelberg, 2011, pp. 125–179.
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2011 | Conference Paper | LibreCat-ID: 2194
Transformation of scientific algorithms to parallel computing code: subdomain support in a MPI-multi-GPU backend
B. Meyer, C. Plessl, J. Förstner, in: Symp. on Application Accelerators in High Performance Computing (SAAHPC), IEEE Computer Society, 2011, pp. 60–63.
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2011 | Conference Paper | LibreCat-ID: 2193
Cooperative multitasking for heterogeneous accelerators in the Linux Completely Fair Scheduler
T. Beisel, T. Wiersema, C. Plessl, A. Brinkmann, in: Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), IEEE Computer Society, 2011, pp. 223–226.
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2011 | Conference Paper | LibreCat-ID: 656
Measuring and Predicting Temperature Distributions on FPGAs at Run-Time
M. Happe, A. Agne, C. Plessl, in: Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig), IEEE, 2011, pp. 55–60.
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2011 | Conference Paper | LibreCat-ID: 2200
Performance Estimation Framework for Automated Exploration of CPU-Accelerator Architectures
T. Kenter, M. Platzner, C. Plessl, M. Kauschke, in: Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA), ACM, New York, NY, USA, 2011, pp. 177–180.
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2011 | Journal Article | LibreCat-ID: 2201
FPGA Acceleration of Communication-bound Streaming Applications: Architecture Modeling and a 3D Image Compositing Case Study
T. Schumacher, T. Süß, C. Plessl, M. Platzner, Int. Journal of Recon- Figurable Computing (IJRC) (2011).
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2011 | Conference Paper | LibreCat-ID: 2198
Just-in-time Instruction Set Extension – Feasibility and Limitations for an FPGA-based Reconfigurable ASIP Architecture
M. Grad, C. Plessl, in: Proc. Reconfigurable Architectures Workshop (RAW), IEEE Computer Society, 2011, pp. 278–285.
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2010 | Conference Paper | LibreCat-ID: 2223
Towards Adaptive Networking for Embedded Devices based on Reconfigurable Hardware
E. Lübbers, M. Platzner, C. Plessl, A. Keller, B. Plattner, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010, pp. 225–231.
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2010 | Conference Paper | LibreCat-ID: 2216
Pruning the Design Space for Just-In-Time Processor Customization
M. Grad, C. Plessl, in: Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), IEEE Computer Society, Los Alamitos, CA, USA, 2010, pp. 67–72.
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2010 | Conference Paper | LibreCat-ID: 2224
An Open Source Circuit Library with Benchmarking Facilities
M. Grad, C. Plessl, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010, pp. 144–150.
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2010 | Conference Paper | LibreCat-ID: 2220
Configurable Processor Architectures: History and Trends
D. Andrews, C. Plessl, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010, p. 165.
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