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426 Publications


2010 | Conference Paper | LibreCat-ID: 13642
A Self-Reconfigurable Lightweight Interconnect for Scalable Processor Fabrics
H. Giefers, M. Platzner, in: Proceedings of the 10th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010.
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2010 | Conference Paper | LibreCat-ID: 2223
Towards Adaptive Networking for Embedded Devices based on Reconfigurable Hardware
E. Lübbers, M. Platzner, C. Plessl, A. Keller, B. Plattner, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010, pp. 225–231.
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2010 | Conference Paper | LibreCat-ID: 2216
Pruning the Design Space for Just-In-Time Processor Customization
M. Grad, C. Plessl, in: Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), IEEE Computer Society, Los Alamitos, CA, USA, 2010, pp. 67–72.
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2010 | Conference Paper | LibreCat-ID: 2224
An Open Source Circuit Library with Benchmarking Facilities
M. Grad, C. Plessl, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010, pp. 144–150.
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2010 | Conference Paper | LibreCat-ID: 2220
Configurable Processor Architectures: History and Trends
D. Andrews, C. Plessl, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010, p. 165.
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2010 | Conference (Editor) | LibreCat-ID: 2222
Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA)
T.P. Plaks, D. Andrews, R. DeMara, H. Lam, J. Lee, C. Plessl, G. Stitt, eds., Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010.
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2010 | Conference Paper | LibreCat-ID: 2226
Using Shared Library Interposing for Transparent Acceleration in Systems with Heterogeneous Hardware Accelerators
T. Beisel, M. Niekamp, C. Plessl, in: Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), IEEE Computer Society, 2010, pp. 65–72.
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2010 | Conference Paper | LibreCat-ID: 2206
Reconfigurable Nodes for Future Networks
A. Keller, B. Plattner, E. Lübbers, M. Platzner, C. Plessl, in: Proc. IEEE Globecom Workshop on Network of the Future (FutureNet), IEEE, 2010, pp. 372–376.
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2010 | Conference Paper | LibreCat-ID: 2228
Performance Estimation for the Exploration of CPU-Accelerator Architectures
T. Kenter, M. Platzner, C. Plessl, M. Kauschke, in: O. Hammami, S. Larrabee (Eds.), Proc. Workshop on Architectural Research Prototyping (WARP), International Symposium on Computer Architecture (ISCA), 2010.
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2009 | Conference Paper | LibreCat-ID: 10639
Towards multi-movement hand prostheses: Combining adaptive classification with high precision sockets
A. Boschmann, P. Kaufmann, M. Platzner, M. Winkler, in: Proc. Technically Assisted Rehabilitation (TAR), 2009.
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2009 | Mastersthesis | LibreCat-ID: 10702
Evolvable Robot Controller
A. Kostin, Evolvable Robot Controller, Paderborn University, 2009.
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2009 | Journal Article | LibreCat-ID: 10703
ReconOS: Multithreaded Programming for Reconfigurable Computers
E. Lübbers, M. Platzner, ACM Transactions on Embedded Computing Systems 9 (2009) 8:1-8:33.
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2009 | Mastersthesis | LibreCat-ID: 10746
Compiler for a Custom Instruction Set CPU
M. Tofall, Compiler for a Custom Instruction Set CPU, Paderborn University, 2009.
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2009 | Mastersthesis | LibreCat-ID: 10749
Coarse-grained CGP Model using Xilinx Virtex5 DSP48E Functional Units
A. Warkentin, Coarse-Grained CGP Model Using Xilinx Virtex5 DSP48E Functional Units, Paderborn University, 2009.
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2009 | Bachelorsthesis | LibreCat-ID: 10753
Implementierung von Kryptographie-Hardwarebeschleunigern für das HW/SW-Betriebssystem ReconOS
B. Wildenhain, Implementierung von Kryptographie-Hardwarebeschleunigern Für Das HW/SW-Betriebssystem ReconOS, Paderborn University, 2009.
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2009 | Conference Paper | LibreCat-ID: 10777
Signature Self Checking (SSC): A Low-Cost Reliable Control Logic for Pipelined Microprocessors
H. Ghasemzadeh Mohammadi, S.G. Miremadi, A. Ejlali, in: Dependable Computing (PRDC), 2009 IEEE Pacific Rim International Symposium On, IEEE, 2009, pp. 252–255.
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2009 | Conference Paper | LibreCat-ID: 13632
A Multithreaded Framework for Sequential Monte Carlo Methods on CPU/FPGA Platforms
M. Happe, E. Lübbers, M. Platzner, in: Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC), Springer, 2009.
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2009 | Conference Paper | LibreCat-ID: 13634
Towards Models for Many-Cores: The Case for the Reconfigurable Mesh
H. Giefers, M. Platzner, in: Proceedings of the Workshop on Many-Cores, International Conference on Architecture of Computing Systems (ARCS), 2009.
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2009 | Conference Paper | LibreCat-ID: 13635
ARMLang: A Language and Compiler for Programming Reconfigurable Mesh Many-Cores
H. Giefers, M. Platzner, in: Reconfigurable Architectures Workshop (RAW), Proceedings of the International Parallel and Distributed Processing Symposium, IEEE, 2009.
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2009 | Conference Paper | LibreCat-ID: 13636
Cooperative Multithreading in Dynamically Reconfigurable Systems
E. Lübbers, M. Platzner, in: Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) , IEEE, 2009.
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2009 | Conference Paper | LibreCat-ID: 13637
Program-driven Fine-grained Power Management for the Reconfigurable Mesh
H. Giefers, M. Platzner, in: Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) , IEEE, 2009.
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2009 | Conference Paper | LibreCat-ID: 13638
An adaptive Sequential Monte Carlo framework with runtime HW/SW repartitioning
M. Happe, E. Lübbers, M. Platzner, in: Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT), IEEE, 2009.
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2009 | Conference Paper | LibreCat-ID: 13639
Proof-carrying Hardware: Towards Runtime Verification of Reconfigurable Modules
S. Drzevitzky, U. Kastens, M. Platzner, in: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2009.
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2009 | Conference Paper | LibreCat-ID: 2350
IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing
T. Schumacher, C. Plessl, M. Platzner, in: Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), IEEE Computer Society, 2009, pp. 275–278.
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2009 | Conference Paper | LibreCat-ID: 2262
EvoCaches: Application-specific Adaptation of Cache Mapping
P. Kaufmann, C. Plessl, M. Platzner, in: Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS), IEEE Computer Society, Los Alamitos, CA, USA, 2009, pp. 11–18.
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2009 | Conference Paper | LibreCat-ID: 2238
Communication Performance Characterization for Reconfigurable Accelerator Design on the XD1000
T. Schumacher, T. Süß, C. Plessl, M. Platzner, in: Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), IEEE Computer Society, Los Alamitos, CA, USA, 2009, pp. 119–124.
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2009 | Conference Paper | LibreCat-ID: 2261
An Accelerator for k-th Nearest Neighbor Thinning Based on the IMORC Infrastructure
T. Schumacher, C. Plessl, M. Platzner, in: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), IEEE, 2009, pp. 338–344.
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2009 | Conference Paper | LibreCat-ID: 2263
Woolcano: An Architecture and Tool Flow for Dynamic Instruction Set Extension on Xilinx Virtex-4 FX
M. Grad, C. Plessl, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, USA, 2009, pp. 319–322.
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2008 | Conference Paper | LibreCat-ID: 2358
A method for OSEM PET reconstruction on parallel architectures using STIR
T. Beisel, S. Lietsch, K. Thielemans, in: IEEE Nuclear Science Symposium Conference Record (NSS), IEEE, 2008, pp. 4161–4168.
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2008 | Conference Paper | LibreCat-ID: 2365
The GOmputer: Accelerating GO with FPGAs
M. Platzner, S. Döhre, M. Happe, T. Kenter, U. Lorenz, T. Schumacher, A. Send, A. Warkentin, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2008, pp. 245–251.
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2008 | Bachelorsthesis | LibreCat-ID: 10628
Aufbau und experimentelle Bewertung eines Systems zur Langzeitklassifikation von EMG-Signalen
A. Boschmann, Aufbau Und Experimentelle Bewertung Eines Systems Zur Langzeitklassifikation von EMG-Signalen, Paderborn University, 2008.
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2008 | Bachelorsthesis | LibreCat-ID: 10641
Selbstoptimierender Cache-Kontroller
D. Breitlauch, Selbstoptimierender Cache-Kontroller, Paderborn University, 2008.
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2008 | Bachelorsthesis | LibreCat-ID: 10644
Verteilte Simulation von mobilen Robotern mit EyeSim
T. Ceylan, C. Yalcin, Verteilte Simulation von Mobilen Robotern Mit EyeSim, Paderborn University, 2008.
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2008 | Conference Paper | LibreCat-ID: 10653
Comparing Evolvable Hardware to Conventional Classifiers for Electromyographic Prosthetic Hand Control
K. Glette, T. Gruber, P. Kaufmann, J. Torresen, B. Sick, M. Platzner, in: IEEE Adaptive Hardware and Systems (AHS), IEEE, 2008, pp. 32–39.
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2008 | Conference Paper | LibreCat-ID: 10656
A Comparison of Evolvable Hardware Architectures for Classification Tasks
K. Glette, J. Torresen, P. Kaufmann, M. Platzner, in: IEEE Intl. Conf. on Evolvable Systems (ICES), Springer, 2008, pp. 22–33.
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2008 | Mastersthesis | LibreCat-ID: 10669
Parallelisierung und Hardware- / Software - Codesign von Partikelfiltern
M. Happe, Parallelisierung Und Hardware- / Software - Codesign von Partikelfiltern, Paderborn University, 2008.
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2008 | Preprint | LibreCat-ID: 10690
Evolvable Hardware - Tutorial at Architecture of Computing Systems (ARCS)
J. Torresen, K. Glette, M. Platzner, P. Kaufmann, (2008).
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2008 | Conference Paper | LibreCat-ID: 10691
Advanced Techniques for the Creation and Propagation of Modules in Cartesian Genetic Programming
P. Kaufmann, M. Platzner, in: Genetic and Evolutionary Computation (GECCO), ACM Press, 2008, pp. 1219–1226.
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2008 | Bachelorsthesis | LibreCat-ID: 10696
Implementierung und Bewertung des multikriteriellen Optimierungsverfahrens IBEA für den automatisierten Schaltungsentwurf
T. Knieper, Implementierung Und Bewertung Des Multikriteriellen Optimierungsverfahrens IBEA Für Den Automatisierten Schaltungsentwurf, Paderborn University, 2008.
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2008 | Conference Paper | LibreCat-ID: 10698
On Robust Evolution of Digital Hardware
T. Knieper, B. Defo, P. Kaufmann, M. Platzner, in: Biologically Inspired Collaborative Computing (BICC), Springer, 2008, pp. 2313–222.
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2008 | Bachelorsthesis | LibreCat-ID: 10718
Eine Monitoring- und Debugging-Infrastruktur für hybride HW/SW-Systeme
J. Niklas, Eine Monitoring- Und Debugging-Infrastruktur Für Hybride HW/SW-Systeme, Paderborn University, 2008.
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2008 | Bachelorsthesis | LibreCat-ID: 10721
Raytracing on a Custom Instruction Set CPU
M. Östermann, Raytracing on a Custom Instruction Set CPU, Paderborn University, 2008.
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2008 | Bachelorsthesis | LibreCat-ID: 10751
Design and Evaluation of MicroBlaze Multi-core Architectures
N. Westerheide, Design and Evaluation of MicroBlaze Multi-Core Architectures, Paderborn University, 2008.
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2008 | Conference Paper | LibreCat-ID: 10778
A cost-effective error detection and roll-back recovery technique for embedded microprocessor control logic
H. Ghasemzadeh Mohammadi, H. Tabkhi, S.G. Miremadi, A. Ejlali, in: 2008 International Conference on Microelectronics, IEEE, 2008, pp. 444–447.
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2008 | Conference Paper | LibreCat-ID: 13629
Realizing Reconfigurable Mesh Algorithms on Softcore Arrays
H. Giefers, M. Platzner, in: Proceedings of the International Symposium on Systems, Architectures, Modeling and Simulation (SAMOS), IEEE, 2008.
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2008 | Conference Paper | LibreCat-ID: 13630
Communication and Synchronization in Multithreaded Reconfigurable Computing Systems
E. Lübbers, M. Platzner, in: Proceedings of the 8th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2008.
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2008 | Conference Paper | LibreCat-ID: 13631
A portable abstraction layer for hardware threads
E. Lübbers, M. Platzner, in: Proceedings of the 18th International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2008.
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2008 | Conference Paper | LibreCat-ID: 2364
A Hardware Accelerator for k-th Nearest Neighbor Thinning
T. Schumacher, R. Meiche, P. Kaufmann, E. Lübbers, C. Plessl, M. Platzner, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2008, pp. 245–251.
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2008 | Conference Paper | LibreCat-ID: 2372
IMORC: An infrastructure for performance monitoring and optimization of reconfigurable computers
T. Schumacher, C. Plessl, M. Platzner, in: Many-Core and Reconfigurable Supercomputing Conference (MRSC), 2008.
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2007 | Conference Paper | LibreCat-ID: 6508
MOVES: A Modular Framework for Hardware Evolution
P. Kaufmann, M. Platzner, in: Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), IEEE, 2007, pp. 447–454.
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2007 | Mastersthesis | LibreCat-ID: 10623
Entwurf und Evaluation eines parallelen Verfahrens zur Bildrekonstruktion in der Positronen-Emissions-Tomographie auf Multi-Core-Architekturen
T. Beisel, Entwurf Und Evaluation Eines Parallelen Verfahrens Zur Bildrekonstruktion in Der Positronen-Emissions-Tomographie Auf Multi-Core-Architekturen, Paderborn University, 2007.
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2007 | Journal Article | LibreCat-ID: 10625
Dynamically Reconfigurable Architectures (editorial)
N. Bergmann, M. Platzner, J. Teich, {EURASIP} Journal on Embedded Systems 2007 (2007) 1–2.
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2007 | Bachelorsthesis | LibreCat-ID: 10643
Distributed Simulation of mobile Robots using EyeSim
T. Ceylan, C. Yalcin, Distributed Simulation of Mobile Robots Using EyeSim, Paderborn University, 2007.
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2007 | Journal Article | LibreCat-ID: 10646
Server-based execution of periodic tasks on dynamically reconfigurable hardware
K. Danne, R. Mühlenbernd, M. Platzner, IET Computers Digital Techniques 1 (2007) 295–302.
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2007 | Mastersthesis | LibreCat-ID: 10647
A Comparison of Multi-Objective Evolutionary Algorithms for Automated Circuit Design and Optimization
B. Defo, A Comparison of Multi-Objective Evolutionary Algorithms for Automated Circuit Design and Optimization, Paderborn University, 2007.
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2007 | Mastersthesis | LibreCat-ID: 10648
Entwurf und Implementierung einer RocketIO-basierten Kommunikationsschnittstelle für Multi-FPGA Systeme
S. Döhre, Entwurf Und Implementierung Einer RocketIO-Basierten Kommunikationsschnittstelle Für Multi-FPGA Systeme, Paderborn University, 2007.
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2007 | Conference Paper | LibreCat-ID: 10689
Toward Self-adaptive Embedded Systems: Multi-objective Hardware Evolution
P. Kaufmann, M. Platzner, in: Architecture of Computing Systems (ARCS), Springer, 2007, pp. 199–208.
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2007 | Bachelorsthesis | LibreCat-ID: 10709
VHDL-Implementierung eines Clustering-Verfahrens für multikriterielle Optimierungsalgorithmen
R. Meiche, VHDL-Implementierung Eines Clustering-Verfahrens Für Multikriterielle Optimierungsalgorithmen, Paderborn University, 2007.
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2007 | Mastersthesis | LibreCat-ID: 10728
Bildverarbeitungs-Architekturen und -Bibliotheken für das rekonfigurierbare Betriebssystem ReconOS
W. Reisch, Bildverarbeitungs-Architekturen Und -Bibliotheken Für Das Rekonfigurierbare Betriebssystem ReconOS, Paderborn University, 2007.
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2007 | Mastersthesis | LibreCat-ID: 10729
Konzeption und Implementierung einer Microsoft Windows CE 5.0 Plattform für ein ARM-basiertes eingebettetes Rechnersystem
E. Rethmeier, Konzeption Und Implementierung Einer Microsoft Windows CE 5.0 Plattform Für Ein ARM-Basiertes Eingebettetes Rechnersystem, Paderborn University, 2007.
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2007 | Conference Paper | LibreCat-ID: 10735
Accelerating the Cube Cut Problem with an FPGA-Augmented Compute Cluster
T. Schumacher, E. Lübbers, P. Kaufmann, M. Platzner, in: Proceedings of the ParaFPGA Symposium, International Conference on Parallel Computing: Architectures, Algorithms and Applications (PARCO), IOS Press, 2007, pp. 749–756.
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2007 | Conference Paper | LibreCat-ID: 13627
A Many-Core Implementation Based on the Reconfigurable Mesh Model
H. Giefers, M. Platzner, in: Proceedings of the 17th International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2007.
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2007 | Conference Paper | LibreCat-ID: 13628
ReconOS: An RTOS Supporting Hard-and Software Threads
E. Lübbers, M. Platzner, in: Proceedings of the 17th International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2007.
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2006 | Conference Paper | LibreCat-ID: 2401
Optimal Temporal Partitioning based on Slowdown and Retiming
C. Plessl, M. Platzner, L. Thiele, in: Proc. Int. Conf. on Field Programmable Technology (ICFPT), IEEE Computer Society, 2006, pp. 345–348.
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2006 | Conference Paper | LibreCat-ID: 10688
Multi-objective Intrinsic Hardware Evolution
P. Kaufmann, M. Platzner, in: Intl. Conf. Military Applications of Programmable Logic Devices (MAPLD), 2006.
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2006 | Bachelorsthesis | LibreCat-ID: 10716
FPGA-Implementierung eines server-basierten Schedulers für periodische Hardwaretasks
R. Mühlenbernd, FPGA-Implementierung Eines Server-Basierten Schedulers Für Periodische Hardwaretasks, Paderborn University, 2006.
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2006 | Conference Paper | LibreCat-ID: 13624
Executing Hardware Tasks on Dynamically Reconfigurable Devices under Real-time Conditions
K. Danne, R. Mühlenbernd, M. Platzner, in: Proceedings of the 16th International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2006.
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2006 | Conference Paper | LibreCat-ID: 13625
An EDF Schedulability Test for Periodic Tasks on Reconfigurable Hardware Devices
K. Danne, M. Platzner, in: In ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES), 2006.
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2006 | Conference Paper | LibreCat-ID: 13626
Partitioned Scheduling of Periodic Real-time Tasks onto Reconfigurable Hardware
K. Danne, M. Platzner, in: Proceedings of the 13th Reconfigurable Architectures Workshop (RAW), IEEE CS Press, 2006.
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2005 | Conference Paper | LibreCat-ID: 2411
Zippy – A coarse-grained reconfigurable array with support for hardware virtualization
C. Plessl, M. Platzner, in: Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), IEEE Computer Society, 2005, pp. 213–218.
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2005 | Journal Article | LibreCat-ID: 2412
System-level performance evaluation of reconfigurable processors
R. Enzler, C. Plessl, M. Platzner, Microprocessors and Microsystems 29 (2005) 63–73.
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2005 | Conference Paper | LibreCat-ID: 13621
Periodic real-time scheduling for FPGA computers
K. Danne, M. Platzner, in: Proceedings of the Third International Workshop on Intelligent Solutions in Embedded Systems (WISES), 2005.
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2005 | Conference Paper | LibreCat-ID: 13622
Memory-demanding Periodic Real-time Applications on FPGA Computers
K. Danne, M. Platzner, in: Work-in-Progress Proceedings of the 17th Euromicro Conference on Real-Time Systems (ECRTS), 2005.
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2005 | Conference Paper | LibreCat-ID: 13623
A heuristic approach to schedule periodic real-time tasks on reconfigurable hardware
K. Danne, M. Platzner, in: Proceedings of the 15th International Conference on Field Programmable Logic and Applications (FPL), IEEE CS Press, 2005.
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2004 | Conference Paper | LibreCat-ID: 2415
Virtualization of Hardware – Introduction and Survey
C. Plessl, M. Platzner, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2004, pp. 63–69.
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2004 | Journal Article | LibreCat-ID: 10742
Operating systems for reconfigurable embedded platforms: online scheduling of real-time tasks
C. Steiger, H. Walder, M. Platzner, {IEEE} Transactions on Computers 53 (2004) 1393–1407.
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2004 | Conference Paper | LibreCat-ID: 13618
A Runtime Environment for Reconfigurable Hardware Operating Systems
H. Walder, M. Platzner, in: Proceedings of the 14th International Conference on Field Programmable Logic and Applications (FPL), Springer, Berlin, Heidelberg, 2004, pp. 831–835.
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2004 | Conference Paper | LibreCat-ID: 13619
XF-BOARD: A Prototyping Platform for Reconfigurable Hardware Operating Systems
H. Walder, S. Nobs, M. Platzner, in: Proceedings of the 4th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2004.
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2004 | Conference Paper | LibreCat-ID: 13620
Efficient Execution of Process Networks on a Reconfigurable Hardware Virtual Machine
M. Dyer, M. Platzner, L. Thiele, in: Proceedings 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), IEEE CS Press, 2004.
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2003 | Conference Paper | LibreCat-ID: 2418
TKDM – A Reconfigurable Co-processor in a PC's Memory Slot
C. Plessl, M. Platzner, in: Proc. Int. Conf. on Field Programmable Technology (ICFPT), IEEE Computer Society, 2003, pp. 252–259.
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2003 | Journal Article | LibreCat-ID: 2419
The Case for Reconfigurable Hardware in Wearable Computing
C. Plessl, R. Enzler, H. Walder, J. Beutel, M. Platzner, L. Thiele, G. Tröster, Personal and Ubiquitous Computing 7 (2003) 299–308.
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2003 | Journal Article | LibreCat-ID: 2420
Instance-Specific Accelerators for Minimum Covering
C. Plessl, M. Platzner, Journal of Supercomputing 26 (2003) 109–129.
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2003 | Conference Paper | LibreCat-ID: 2421
Virtualizing Hardware with Multi-Context Reconfigurable Arrays
R. Enzler, C. Plessl, M. Platzner, in: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), Springer, 2003, pp. 151–160.
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2003 | Conference Paper | LibreCat-ID: 2422
Co-simulation of a Hybrid Multi-Context Architecture
R. Enzler, C. Plessl, M. Platzner, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2003, pp. 174–180.
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2003 | Conference Paper | LibreCat-ID: 13612
Online scheduling for block-partitioned reconfigurable devices
H. Walder, M. Platzner, in: Proceedings Design, Automation and Test in Europe Conference (DATE), IEEE CS Press, 2003, pp. 290–295.
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2003 | Conference Paper | LibreCat-ID: 13613
Fast online task placement on FPGAs: free space partitioning and 2D-hashing
H. Walder, C. Steiger, M. Platzner, in: Proceedings International Parallel and Distributed Processing Symposium, IEEE CS Press, 2003.
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2003 | Conference Paper | LibreCat-ID: 13614
Reconfigurable Hardware Operating Systems: From Design Concepts to Realizations
H. Walder, M. Platzner, in: Proceedings of the 3rd International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2003, pp. 284–287.
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2003 | Conference Paper | LibreCat-ID: 13615
Heuristics for Online Scheduling Real-Time Tasks to Partially Reconfigurable Devices
C. Steiger, H. Walder, M. Platzner, in: Proceedings of the 13th International Conference on Field Programmable Logic and Applications (FPL), Springer, Berlin, Heidelberg, 2003, pp. 575–584.
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2003 | Conference Paper | LibreCat-ID: 13617
Online scheduling and placement of real-time tasks to partially reconfigurable devices
C. Steiger, H. Walder, M. Platzner, L. Thiele, in: Proceedings 24th IEEE International Real-Time Systems Symposium (RTSS), IEEE CS Press, 2003, pp. 252–235.
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2002 | Conference Paper | LibreCat-ID: 2423
Reconfigurable Hardware in Wearable Computing Nodes
C. Plessl, R. Enzler, H. Walder, J. Beutel, M. Platzner, L. Thiele, in: Proc. Int. Symp. on Wearable Computers (ISWC), IEEE Computer Society, 2002, pp. 215–222.
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2002 | Conference Paper | LibreCat-ID: 2424
Partially Reconfigurable Cores for Xilinx Virtex
M. Dyer, C. Plessl, M. Platzner, in: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), Springer, 2002, pp. 292–301.
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2002 | Conference Paper | LibreCat-ID: 2425
Custom Computing Machines for the Set Covering Problem
C. Plessl, M. Platzner, in: Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), IEEE Computer Society, 2002, pp. 163–172.
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2002 | Journal Article | LibreCat-ID: 10651
A Framework for Run-time Reconfigurable Systems
M. Eisenring, M. Platzner, The Journal of Supercomputing 21 (2002) 145–159.
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2002 | Conference Paper | LibreCat-ID: 13611
Non-preemptive Multitasking on FPGAs: Task Placement and Footprint Transform
H. Walder, M. Platzner, in: Proceedings of the 2nd International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2002, pp. 24–30.
LibreCat
 

2001 | Conference Paper | LibreCat-ID: 2428
Instance-Specific Accelerators for Minimum Covering
C. Plessl, M. Platzner, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2001, pp. 85–91.
LibreCat
 

2001 | Conference Paper | LibreCat-ID: 2432
Reconfigurable Processors for Handhelds and Wearables: Application Analysis
R. Enzler, M. Platzner, C. Plessl, L. Thiele, G. Tröster, in: Reconfigurable Technology: FPGAs and Reconfigurable Processors for Computing and Communications III, 2001, pp. 135–146.
LibreCat | DOI
 

2001 | Journal Article | LibreCat-ID: 10713
Object-oriented domain specific compilers for programming FPGAs
O. Mencer, M. Platzner, M. Morf, M. J. Flynn, {IEEE} Transactions on Very Large Scale Integration ({VLSI}) Systems 9 (2001) 205–210.
LibreCat | DOI
 

2001 | Misc | LibreCat-ID: 13463
Dynamically Reconfigurable Processors
R. Enzler, M. Platzner, Dynamically Reconfigurable Processors, TELEMATIK, Zeitschrift des Telematik-Ingebieur-Verbandes 7(1), 2001.
LibreCat
 

2000 | Journal Article | LibreCat-ID: 6507
Reconfigurable accelerators for combinatorial problems
M. Platzner, Computer 33 (2000) 58–60.
LibreCat | DOI
 

2000 | Journal Article | LibreCat-ID: 10606
Synthesis of Interfaces and Communication in Reconfigurable Embedded Systems
M. Eisenring, M. Platzner, IEE Proceedings -- Computers & Digital Techniques 147 (2000) 159–165.
LibreCat | DOI
 

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