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368 Publications


2007 | Conference Paper | LibreCat-ID: 13627
Giefers, Heiner, and Marco Platzner. “A Many-Core Implementation Based on the Reconfigurable Mesh Model.” In Proceedings of the 17th International Conference on Field Programmable Logic and Applications (FPL). IEEE, 2007. https://doi.org/10.1109/fpl.2007.4380623.
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2007 | Bachelorsthesis | LibreCat-ID: 10643
Ceylan, Toni, and Coni Yalcin. Distributed Simulation of Mobile Robots Using EyeSim. Paderborn University, 2007.
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2007 | Mastersthesis | LibreCat-ID: 10648
Döhre, Sven. Entwurf Und Implementierung Einer RocketIO-Basierten Kommunikationsschnittstelle Für Multi-FPGA Systeme. Paderborn University, 2007.
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2007 | Conference Paper | LibreCat-ID: 13628
Lübbers, Enno, and Marco Platzner. “ReconOS: An RTOS Supporting Hard-and Software Threads.” In Proceedings of the 17th International Conference on Field Programmable Logic and Applications (FPL). IEEE, 2007. https://doi.org/10.1109/fpl.2007.4380686.
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2007 | Journal Article | LibreCat-ID: 10625
Bergmann, Neil, Marco Platzner, and Jürgen Teich. “Dynamically Reconfigurable Architectures (Editorial).” {EURASIP} Journal on Embedded Systems 2007 (2007): 1–2. https://doi.org/10.1155/2007/28405.
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2006 | Bachelorsthesis | LibreCat-ID: 10716
Mühlenbernd, Roland. FPGA-Implementierung Eines Server-Basierten Schedulers Für Periodische Hardwaretasks. Paderborn University, 2006.
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2006 | Conference Paper | LibreCat-ID: 13626
Danne, Klaus, and Marco Platzner. “Partitioned Scheduling of Periodic Real-Time Tasks onto Reconfigurable Hardware.” In Proceedings of the 13th Reconfigurable Architectures Workshop (RAW). IEEE CS Press, 2006.
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2006 | Conference Paper | LibreCat-ID: 2401
Plessl, Christian, Marco Platzner, and Lothar Thiele. “Optimal Temporal Partitioning Based on Slowdown and Retiming.” In Proc. Int. Conf. on Field Programmable Technology (ICFPT), 345–48. IEEE Computer Society, 2006. https://doi.org/10.1109/FPT.2006.270344.
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2006 | Conference Paper | LibreCat-ID: 13624
Danne, Klaus, Roland Mühlenbernd, and Marco Platzner. “Executing Hardware Tasks on Dynamically Reconfigurable Devices under Real-Time Conditions.” In Proceedings of the 16th International Conference on Field Programmable Logic and Applications (FPL). IEEE, 2006.
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2006 | Conference Paper | LibreCat-ID: 10688
Kaufmann, Paul, and Marco Platzner. “Multi-Objective Intrinsic Hardware Evolution.” In Intl. Conf. Military Applications of Programmable Logic Devices (MAPLD), 2006.
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2006 | Conference Paper | LibreCat-ID: 13625
Danne, Klaus, and Marco Platzner. “An EDF Schedulability Test for Periodic Tasks on Reconfigurable Hardware Devices.” In In ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES), 2006.
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2005 | Conference Paper | LibreCat-ID: 13621
Danne, Klaus, and Marco Platzner. “Periodic Real-Time Scheduling for FPGA Computers.” In Proceedings of the Third International Workshop on Intelligent Solutions in Embedded Systems (WISES), 2005. https://doi.org/10.1109/wises.2005.1438720.
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2005 | Journal Article | LibreCat-ID: 2412
Enzler, Rolf, Christian Plessl, and Marco Platzner. “System-Level Performance Evaluation of Reconfigurable Processors.” Microprocessors and Microsystems 29, no. 2–3 (2005): 63–73. https://doi.org/10.1016/j.micpro.2004.06.004.
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2005 | Conference Paper | LibreCat-ID: 13622
Danne, Klaus, and Marco Platzner. “Memory-Demanding Periodic Real-Time Applications on FPGA Computers.” In Work-in-Progress Proceedings of the 17th Euromicro Conference on Real-Time Systems (ECRTS), 2005.
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2005 | Conference Paper | LibreCat-ID: 13623
Danne, Klaus, and Marco Platzner. “A Heuristic Approach to Schedule Periodic Real-Time Tasks on Reconfigurable Hardware.” In Proceedings of the 15th International Conference on Field Programmable Logic and Applications (FPL). IEEE CS Press, 2005. https://doi.org/10.1109/fpl.2005.1515787.
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2005 | Conference Paper | LibreCat-ID: 2411
Plessl, Christian, and Marco Platzner. “Zippy – A Coarse-Grained Reconfigurable Array with Support for Hardware Virtualization.” In Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), 213–18. IEEE Computer Society, 2005. https://doi.org/10.1109/ASAP.2005.69.
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2004 | Journal Article | LibreCat-ID: 10742
Steiger, Christoph, Herbert Walder, and Marco Platzner. “Operating Systems for Reconfigurable Embedded Platforms: Online Scheduling of Real-Time Tasks.” {IEEE} Transactions on Computers 53, no. 11 (2004): 1393–1407. https://doi.org/10.1109/tc.2004.99.
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2004 | Conference Paper | LibreCat-ID: 13619
Walder, Hebert, Samuel Nobs, and Marco Platzner. “XF-BOARD: A Prototyping Platform for Reconfigurable Hardware Operating Systems.” In Proceedings of the 4th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press, 2004.
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2004 | Conference Paper | LibreCat-ID: 2415
Plessl, Christian, and Marco Platzner. “Virtualization of Hardware – Introduction and Survey.” In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 63–69. CSREA Press, 2004.
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2004 | Conference Paper | LibreCat-ID: 13618
Walder, Herbert, and Marco Platzner. “A Runtime Environment for Reconfigurable Hardware Operating Systems.” In Proceedings of the 14th International Conference on Field Programmable Logic and Applications (FPL), 831–35. Berlin, Heidelberg: Springer, 2004. https://doi.org/10.1007/978-3-540-30117-2_84.
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2004 | Conference Paper | LibreCat-ID: 13620
Dyer, Matthias, Marco Platzner, and Lothar Thiele. “Efficient Execution of Process Networks on a Reconfigurable Hardware Virtual Machine.” In Proceedings 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM). IEEE CS Press, 2004. https://doi.org/10.1109/fccm.2004.31.
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2003 | Conference Paper | LibreCat-ID: 13614
Walder, Herbert, and Marco Platzner. “Reconfigurable Hardware Operating Systems: From Design Concepts to Realizations.” In Proceedings of the 3rd International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), 284–87. CSREA Press, 2003.
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2003 | Conference Paper | LibreCat-ID: 13615
Steiger, Christoph, Herbert Walder, and Marco Platzner. “Heuristics for Online Scheduling Real-Time Tasks to Partially Reconfigurable Devices.” In Proceedings of the 13th International Conference on Field Programmable Logic and Applications (FPL), 575–84. Berlin, Heidelberg: Springer, 2003. https://doi.org/10.1007/978-3-540-45234-8_56.
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2003 | Conference Paper | LibreCat-ID: 2418
Plessl, Christian, and Marco Platzner. “TKDM – A Reconfigurable Co-Processor in a PC’s Memory Slot.” In Proc. Int. Conf. on Field Programmable Technology (ICFPT), 252–59. IEEE Computer Society, 2003. https://doi.org/10.1109/FPT.2003.1275755.
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2003 | Journal Article | LibreCat-ID: 2420
Plessl, Christian, and Marco Platzner. “Instance-Specific Accelerators for Minimum Covering.” Journal of Supercomputing 26, no. 2 (2003): 109–29. https://doi.org/10.1023/a:1024443416592.
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2003 | Journal Article | LibreCat-ID: 2419
Plessl, Christian, Rolf Enzler, Herbert Walder, Jan Beutel, Marco Platzner, Lothar Thiele, and Gerhard Tröster. “The Case for Reconfigurable Hardware in Wearable Computing.” Personal and Ubiquitous Computing 7, no. 5 (2003): 299–308. https://doi.org/10.1007/s00779-003-0243-x.
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2003 | Conference Paper | LibreCat-ID: 2421
Enzler, Rolf, Christian Plessl, and Marco Platzner. “Virtualizing Hardware with Multi-Context Reconfigurable Arrays.” In Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 2778:151–60. Lecture Notes in Computer Science (LNCS). Springer, 2003. https://doi.org/10.1007/b12007.
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2003 | Conference Paper | LibreCat-ID: 13612
Walder, Herbert, and Marco Platzner. “Online Scheduling for Block-Partitioned Reconfigurable Devices.” In Proceedings Design, Automation and Test in Europe Conference (DATE), 290–95. IEEE CS Press, 2003. https://doi.org/10.1109/date.2003.1253622.
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2003 | Conference Paper | LibreCat-ID: 13617
Steiger, Christoph, Herbert Walder, Marco Platzner, and Lothar Thiele. “Online Scheduling and Placement of Real-Time Tasks to Partially Reconfigurable Devices.” In Proceedings 24th IEEE International Real-Time Systems Symposium (RTSS), 252–235. IEEE CS Press, 2003. https://doi.org/10.1109/real.2003.1253269.
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2003 | Conference Paper | LibreCat-ID: 2422
Enzler, Rolf, Christian Plessl, and Marco Platzner. “Co-Simulation of a Hybrid Multi-Context Architecture.” In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 174–80. CSREA Press, 2003.
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2003 | Conference Paper | LibreCat-ID: 13613
Walder, Herbert, Christoph Steiger, and Marco Platzner. “Fast Online Task Placement on FPGAs: Free Space Partitioning and 2D-Hashing.” In Proceedings International Parallel and Distributed Processing Symposium. IEEE CS Press, 2003. https://doi.org/10.1109/ipdps.2003.1213329.
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2002 | Conference Paper | LibreCat-ID: 2424
Dyer, Matthias, Christian Plessl, and Marco Platzner. “Partially Reconfigurable Cores for Xilinx Virtex.” In Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 2438:292–301. Lecture Notes in Computer Science (LNCS). Springer, 2002. https://doi.org/10.1007/3-540-46117-5.
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2002 | Conference Paper | LibreCat-ID: 2425
Plessl, Christian, and Marco Platzner. “Custom Computing Machines for the Set Covering Problem.” In Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), 163–72. IEEE Computer Society, 2002. https://doi.org/10.1109/FPGA.2002.1106671.
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2002 | Conference Paper | LibreCat-ID: 13611
Walder, Herbert, and Marco Platzner. “Non-Preemptive Multitasking on FPGAs: Task Placement and Footprint Transform.” In Proceedings of the 2nd International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), 24–30. CSREA Press, 2002.
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2002 | Journal Article | LibreCat-ID: 10651
Eisenring, Michael, and Marco Platzner. “A Framework for Run-Time Reconfigurable Systems.” The Journal of Supercomputing 21, no. 2 (2002): 145–59. https://doi.org/10.1023/a:1013627403946.
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2002 | Conference Paper | LibreCat-ID: 2423
Plessl, Christian, Rolf Enzler, Herbert Walder, Jan Beutel, Marco Platzner, and Lothar Thiele. “Reconfigurable Hardware in Wearable Computing Nodes.” In Proc. Int. Symp. on Wearable Computers (ISWC), 215–22. IEEE Computer Society, 2002. https://doi.org/10.1109/ISWC.2002.1167250.
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2001 | Misc | LibreCat-ID: 13463
Enzler, Rolf, and Marco Platzner. Dynamically Reconfigurable Processors. TELEMATIK, Zeitschrift des Telematik-Ingebieur-Verbandes 7(1), 2001.
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2001 | Conference Paper | LibreCat-ID: 2432
Enzler, Rolf, Marco Platzner, Christian Plessl, Lothar Thiele, and Gerhard Tröster. “Reconfigurable Processors for Handhelds and Wearables: Application Analysis.” In Reconfigurable Technology: FPGAs and Reconfigurable Processors for Computing and Communications III, 4525:135–46. Proc. SPIE, 2001. https://doi.org/10.1117/12.434376.
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2001 | Journal Article | LibreCat-ID: 10713
Mencer, Oskar, Marco Platzner, Martin Morf, and Michael J. Flynn. “Object-Oriented Domain Specific Compilers for Programming FPGAs.” {IEEE} Transactions on Very Large Scale Integration ({VLSI}) Systems 9, no. 1 (2001): 205–10. https://doi.org/10.1109/92.920835.
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2001 | Conference Paper | LibreCat-ID: 2428
Plessl, Christian, and Marco Platzner. “Instance-Specific Accelerators for Minimum Covering.” In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 85–91. CSREA Press, 2001.
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2000 | Conference Paper | LibreCat-ID: 13610
Eisenring, Michael, and Marco Platzner. “Optimization of Run-Time Reconfigurable Embedded Systems.” In Proceedings of the 10th International Workshop on Field Programmable Logic and Applications (FPL), 565–74. Springer, 2000.
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2000 | Journal Article | LibreCat-ID: 10725
Platzner, Marco, Bernhard Rinner, and Reinhold Weiss. “Toward Embedded Qualitative Simulation: A Specialized Computer Architecture for QSim.” IEEE Intelligent Systems 15, no. 2 (2000): 62–68. https://doi.org/10.1109/5254.850829.
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2000 | Conference Paper | LibreCat-ID: 13609
Eisenring, Michael H., and Marco Platzner. “An Implementation Framework for Run-Time Reconfigurable Systems.” In Proceedings of the 2nd International Workshop on Engineering of Reconfigurable Hardware/Software Objects (ENREGLE), 151–57. CSREA Press, 2000.
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2000 | Journal Article | LibreCat-ID: 10606
Eisenring, Michael, and Marco Platzner. “Synthesis of Interfaces and Communication in Reconfigurable Embedded Systems.” IEE Proceedings -- Computers & Digital Techniques 147 (2000): 159–65. https://doi.org/10.1049/ip-cdt:20000496.
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2000 | Journal Article | LibreCat-ID: 6507
Platzner, Marco. “Reconfigurable Accelerators for Combinatorial Problems.” Computer 33, no. 4 (2000): 58–60. https://doi.org/10.1109/2.839322.
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1999 | Conference Paper | LibreCat-ID: 13607
Mencer, Oskar, and Marco Platzner. “Dynamic Circuit Generation for Boolean Satisfiability in an Object-Oriented Design Environment.” In Proceedings of the 32nd Annual Hawaii International Conference on Systems Sciences (HICSS-32). IEEE CS Press, 1999. https://doi.org/10.1109/hicss.1999.772883.
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1999 | Conference Paper | LibreCat-ID: 13608
Eisenring, Michael, Marco Platzner, and Lothar Thiele. “Communication Synthesis for Reconfigurable Embedded Systems.” In Proceedings of the 9th International Workshop on Field Programmable Logic and Applications (FPL), 1673:205–14. LCS. Springer, 1999. https://doi.org/10.1007/978-3-540-48302-1_21.
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1998 | Journal Article | LibreCat-ID: 10608
Platzner, Marco, and Bernhard Rinner. “Design and Implementation of a Parallel Constraint Satisfaction Algorithm.” International Journal of Computers & Their Applications 5 (1998): 106–16.
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1998 | Misc | LibreCat-ID: 13464
Platzner, Marco, Bernhard Rinner, and Reinhold Weiss. A Distributed Computer Architecture for Fast Qualitative Simulation . Texas Instruments, The Elite Yearbook 1997 - Digital Signal Processing Solutions from Europe’s leading Universities, 1998.
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1998 | Journal Article | LibreCat-ID: 10607
Platzner, Marco. “Reconfigurable Computer Architectures.” E&i Elektrotechnik Und Informationstechnik 115 (1998): 143–48.
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1998 | Conference Paper | LibreCat-ID: 13606
Platzner, Marco, and Giovanni De Micheli. “Acceleration of Satisfiability Algorithms by Reconfigurable Hardware.” In Proceedings of the 8th International Workshop on Field Programmable Logic and Applications (FPL) , 69–78. LNCS. Berlin, Heidelberg: Springer , 1998. https://doi.org/10.1007/bfb0055234.
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1997 | Journal Article | LibreCat-ID: 10609
Platzner, Marco, Bernhard Rinner, and Reinhold Weiss. “A Computer Architecture to Support Qualitative Simulation in Industrial Applications.” E & i Elektrotechnik Und Informationstechnik 114 (1997): 13–18.
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1997 | Journal Article | LibreCat-ID: 10724
Platzner, Marco, Bernhard Rinner, and Reinhold Weiss. “Parallel Qualitative Simulation.” Simulation Practice and Theory 5, no. 7–8 (1997): 623–38. https://doi.org/10.1016/s0928-4869(97)00008-6.
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1997 | Conference Paper | LibreCat-ID: 13603
Platzner, Marco, and Liliane Peters. “Fast Signature Segmentation on a Multi-DSP Architecture.” In Proceedings of the SPIE: Conference on Parallel and Distributed Methods for Image Processing, Vol. 3166, 1997.
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1997 | Conference Paper | LibreCat-ID: 13604
Röwekamp, Thomas, Marco Platzner, and Liliane Peters. “Specialized Architectures for Optical Flow Computation: A Performance Comparison of ASIC, DSP, and Multi-DSP.” In Proceedings of the 8th International Conference on Signal Processing Applications & Technology (ICSPAT), 829–33, 1997.
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1996 | Conference Paper | LibreCat-ID: 13602
Lind, Erich, Marco Platzner, and Bernhard Rinner. “A Multi-DSP System with Dynamically Reconfigurable Processors.” In Proceedings of the 7th International Conference on Signal Processing Applications & Technology (ICSPAT), 1996.
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1995 | Journal Article | LibreCat-ID: 10610
Platzner, Marco, Bernhard Rinner, and Reinhold Weiss. “Exploiting Parallelism in Constraint Satisfaction for Qualitative Simulation.” J.UCS Journal of Universal Computer Science 12 (1995): 811–20.
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1995 | Conference Paper | LibreCat-ID: 13474
Platzner, Marco, and Bernhard Rinner. “High-Performance Qualitative Simulation on a Multi-DSP Architecture.” In Proceedings of the 6th International Conference on Signal Processing Applications & Technology (ICSPAT), 1995.
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1995 | Conference Paper | LibreCat-ID: 13470
Brenner, Eugen, Robert Ginthör-Kalcsics, Robert Hranitzky, Marco Platzner, Bernhard Rinner, Christian Steger, and Reinhold Weiss. “High-Performance Simulators Based on Multi-TMS320C40.” In Proceedings of the 5th Annual Texas Instruments TMS320 Educators Conference, 1995.
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1995 | Conference Paper | LibreCat-ID: 13469
Platzner, Marco, Bernhard Rinner, and Reinhold Weiss. “A Distributed Computer Architecture for Qualitative Simulation Based on a Multi-DSP and FPGAs.” In Proceedings of the 3rd Euromicro Workshop on Parallel and Distributed Processing , 311–18. IEEE CS Press, 1995.
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1995 | Conference Paper | LibreCat-ID: 13471
Friedl, Gerald, Marco Platzner, and Bernhard Rinner. “A Special-Purpose Coprocessor for Qualitative Simulation.” In Proceedings of the EURO-PAR’95 International Conference on Parallel Processing, 695–98. Springer International Publishing, 1995.
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1995 | Conference Paper | LibreCat-ID: 13472
Platzner, Marco, Bernhard Rinner, and Reinhold Weiss. “Parallel Qualitative Simulation.” In Proceedings of the EUROSIM Congress, 231–36. Elsevier, 1995.
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1995 | Conference Paper | LibreCat-ID: 13484
Hranitzky, Robert, and Marco Platzner. “Design and Implementation of Adaptive Digital Filters on a Multi-TMS320C40 System.” In Proceedings of the 6th International Conference on Signal Processing Applications & Technology (ICSPAT), 1995.
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1995 | Conference Paper | LibreCat-ID: 13473
Platzner, Marco, and Bernhard Rinner. “Improving Performance of the Qualitative Simulator QSIM - Design and Implementation of a Specialized Computer Architecture.” In Proceedings of the PDCS International Conference on Parallel and Distributed Computing Systems, 494–501. ISCA, 1995.
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1994 | Conference Paper | LibreCat-ID: 13468
Platzner, Marco, Christian Steger, and Reinhold Weiss. “Experimental Evaluation of Multi-DSP Architectures in High Performance Applications.” In Proceedings of the 7th Mediterranean Electrotechnical Conference. IEEE Press, 1994.
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1993 | Conference Paper | LibreCat-ID: 13467
Platzner, Marco, Christian Steger, and Reinhold Weiss. “Performance Measurements on a Multi-DSP Architecture with TMS320C40.” In Proceedings of the 4th International Conference on Signal Processing Applications & Technology (ICSPAT). DSP Associates, 1993.
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1993 | Journal Article | LibreCat-ID: 13466
Platzner, Marco, and Christian Steger. “Erfahrungen mit einer Multi-Signalprozessorarchitektur (TMS320C40).” Mikroelektronik, 1993.
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1992 | Conference Paper | LibreCat-ID: 13465
Ginthör, Robert, Marco Platzner, and Reinhold Weiss. “Experimental Results to Interprocessor Communication in Distributed Transputer-Systems.” In Proceedings of the 1st Austrian-Hungarian Workshop on Transputer Applications, 45–54, 1992.
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