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426 Publications


2010 | Conference Paper | LibreCat-ID: 13642
H. Giefers and M. Platzner, “A Self-Reconfigurable Lightweight Interconnect for Scalable Processor Fabrics,” in Proceedings of the 10th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2010.
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2010 | Conference Paper | LibreCat-ID: 2223
E. Lübbers, M. Platzner, C. Plessl, A. Keller, and B. Plattner, “Towards Adaptive Networking for Embedded Devices based on Reconfigurable Hardware,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2010, pp. 225–231.
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2010 | Conference Paper | LibreCat-ID: 2216
M. Grad and C. Plessl, “Pruning the Design Space for Just-In-Time Processor Customization,” in Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), 2010, pp. 67–72, doi: 10.1109/ReConFig.2010.19.
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2010 | Conference Paper | LibreCat-ID: 2224
M. Grad and C. Plessl, “An Open Source Circuit Library with Benchmarking Facilities,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2010, pp. 144–150.
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2010 | Conference Paper | LibreCat-ID: 2220
D. Andrews and C. Plessl, “Configurable Processor Architectures: History and Trends,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2010, p. 165.
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2010 | Conference (Editor) | LibreCat-ID: 2222
T. P. Plaks et al., Eds., Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press, 2010.
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2010 | Conference Paper | LibreCat-ID: 2226
T. Beisel, M. Niekamp, and C. Plessl, “Using Shared Library Interposing for Transparent Acceleration in Systems with Heterogeneous Hardware Accelerators,” in Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), 2010, pp. 65–72, doi: 10.1109/ASAP.2010.5540798.
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2010 | Conference Paper | LibreCat-ID: 2206
A. Keller, B. Plattner, E. Lübbers, M. Platzner, and C. Plessl, “Reconfigurable Nodes for Future Networks,” in Proc. IEEE Globecom Workshop on Network of the Future (FutureNet), 2010, pp. 372–376, doi: 10.1109/GLOCOMW.2010.5700341.
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2010 | Conference Paper | LibreCat-ID: 2228
T. Kenter, M. Platzner, C. Plessl, and M. Kauschke, “Performance Estimation for the Exploration of CPU-Accelerator Architectures,” in Proc. Workshop on Architectural Research Prototyping (WARP), International Symposium on Computer Architecture (ISCA), 2010.
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2009 | Conference Paper | LibreCat-ID: 10639
A. Boschmann, P. Kaufmann, M. Platzner, and M. Winkler, “Towards multi-movement hand prostheses: Combining adaptive classification with high precision sockets,” in Proc. Technically Assisted Rehabilitation (TAR), 2009.
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2009 | Mastersthesis | LibreCat-ID: 10702
A. Kostin, Evolvable Robot Controller. Paderborn University, 2009.
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2009 | Journal Article | LibreCat-ID: 10703
E. Lübbers and M. Platzner, “ReconOS: Multithreaded Programming for Reconfigurable Computers,” ACM Transactions on Embedded Computing Systems, vol. 9, no. 1, pp. 8:1-8:33, 2009.
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2009 | Mastersthesis | LibreCat-ID: 10746
M. Tofall, Compiler for a Custom Instruction Set CPU. Paderborn University, 2009.
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2009 | Mastersthesis | LibreCat-ID: 10749
A. Warkentin, Coarse-grained CGP Model using Xilinx Virtex5 DSP48E Functional Units. Paderborn University, 2009.
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2009 | Bachelorsthesis | LibreCat-ID: 10753
B. Wildenhain, Implementierung von Kryptographie-Hardwarebeschleunigern für das HW/SW-Betriebssystem ReconOS. Paderborn University, 2009.
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2009 | Conference Paper | LibreCat-ID: 10777
H. Ghasemzadeh Mohammadi, S. G. Miremadi, and A. Ejlali, “Signature Self Checking (SSC): A Low-Cost Reliable Control Logic for Pipelined Microprocessors,” in Dependable Computing (PRDC), 2009 IEEE Pacific Rim International Symposium on, 2009, pp. 252–255.
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2009 | Conference Paper | LibreCat-ID: 13632
M. Happe, E. Lübbers, and M. Platzner, “A Multithreaded Framework for Sequential Monte Carlo Methods on CPU/FPGA Platforms,” in Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC), 2009.
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2009 | Conference Paper | LibreCat-ID: 13634
H. Giefers and M. Platzner, “Towards Models for Many-Cores: The Case for the Reconfigurable Mesh,” in Proceedings of the Workshop on Many-Cores, International Conference on Architecture of Computing Systems (ARCS), 2009.
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2009 | Conference Paper | LibreCat-ID: 13635
H. Giefers and M. Platzner, “ARMLang: A Language and Compiler for Programming Reconfigurable Mesh Many-Cores,” in Reconfigurable Architectures Workshop (RAW), Proceedings of the International Parallel and Distributed Processing Symposium, 2009.
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2009 | Conference Paper | LibreCat-ID: 13636
E. Lübbers and M. Platzner, “Cooperative Multithreading in Dynamically Reconfigurable Systems,” in Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) , 2009.
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2009 | Conference Paper | LibreCat-ID: 13637
H. Giefers and M. Platzner, “Program-driven Fine-grained Power Management for the Reconfigurable Mesh,” in Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) , 2009.
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2009 | Conference Paper | LibreCat-ID: 13638
M. Happe, E. Lübbers, and M. Platzner, “An adaptive Sequential Monte Carlo framework with runtime HW/SW repartitioning,” in Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT), 2009.
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2009 | Conference Paper | LibreCat-ID: 13639
S. Drzevitzky, U. Kastens, and M. Platzner, “Proof-carrying Hardware: Towards Runtime Verification of Reconfigurable Modules,” in Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2009.
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2009 | Conference Paper | LibreCat-ID: 2350
T. Schumacher, C. Plessl, and M. Platzner, “IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing,” in Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), 2009, pp. 275–278, doi: 10.1109/FCCM.2009.25.
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2009 | Conference Paper | LibreCat-ID: 2262
P. Kaufmann, C. Plessl, and M. Platzner, “EvoCaches: Application-specific Adaptation of Cache Mapping,” in Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 2009, pp. 11–18.
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2009 | Conference Paper | LibreCat-ID: 2238
T. Schumacher, T. Süß, C. Plessl, and M. Platzner, “Communication Performance Characterization for Reconfigurable Accelerator Design on the XD1000,” in Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), 2009, pp. 119–124, doi: 10.1109/ReConFig.2009.32.
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2009 | Conference Paper | LibreCat-ID: 2261
T. Schumacher, C. Plessl, and M. Platzner, “An Accelerator for k-th Nearest Neighbor Thinning Based on the IMORC Infrastructure,” in Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 2009, pp. 338–344.
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2009 | Conference Paper | LibreCat-ID: 2263
M. Grad and C. Plessl, “Woolcano: An Architecture and Tool Flow for Dynamic Instruction Set Extension on Xilinx Virtex-4 FX,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2009, pp. 319–322.
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2008 | Conference Paper | LibreCat-ID: 2358
T. Beisel, S. Lietsch, and K. Thielemans, “A method for OSEM PET reconstruction on parallel architectures using STIR,” in IEEE Nuclear Science Symposium Conference Record (NSS), 2008, pp. 4161–4168.
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2008 | Conference Paper | LibreCat-ID: 2365
M. Platzner et al., “The GOmputer: Accelerating GO with FPGAs,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2008, pp. 245–251.
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2008 | Bachelorsthesis | LibreCat-ID: 10628
A. Boschmann, Aufbau und experimentelle Bewertung eines Systems zur Langzeitklassifikation von EMG-Signalen. Paderborn University, 2008.
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2008 | Bachelorsthesis | LibreCat-ID: 10641
D. Breitlauch, Selbstoptimierender Cache-Kontroller. Paderborn University, 2008.
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2008 | Bachelorsthesis | LibreCat-ID: 10644
T. Ceylan and C. Yalcin, Verteilte Simulation von mobilen Robotern mit EyeSim. Paderborn University, 2008.
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2008 | Conference Paper | LibreCat-ID: 10653
K. Glette, T. Gruber, P. Kaufmann, J. Torresen, B. Sick, and M. Platzner, “Comparing Evolvable Hardware to Conventional Classifiers for Electromyographic Prosthetic Hand Control,” in IEEE Adaptive Hardware and Systems (AHS), 2008, pp. 32–39.
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2008 | Conference Paper | LibreCat-ID: 10656
K. Glette, J. Torresen, P. Kaufmann, and M. Platzner, “A Comparison of Evolvable Hardware Architectures for Classification Tasks,” in IEEE Intl. Conf. on Evolvable Systems (ICES), 2008, vol. 5216, pp. 22–33.
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2008 | Mastersthesis | LibreCat-ID: 10669
M. Happe, Parallelisierung und Hardware- / Software - Codesign von Partikelfiltern. Paderborn University, 2008.
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2008 | Preprint | LibreCat-ID: 10690
J. Torresen, K. Glette, M. Platzner, and P. Kaufmann, “Evolvable Hardware - Tutorial at Architecture of Computing Systems (ARCS).” 2008.
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2008 | Conference Paper | LibreCat-ID: 10691
P. Kaufmann and M. Platzner, “Advanced Techniques for the Creation and Propagation of Modules in Cartesian Genetic Programming,” in Genetic and Evolutionary Computation (GECCO), 2008, pp. 1219–1226.
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2008 | Bachelorsthesis | LibreCat-ID: 10696
T. Knieper, Implementierung und Bewertung des multikriteriellen Optimierungsverfahrens IBEA für den automatisierten Schaltungsentwurf. Paderborn University, 2008.
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2008 | Conference Paper | LibreCat-ID: 10698
T. Knieper, B. Defo, P. Kaufmann, and M. Platzner, “On Robust Evolution of Digital Hardware,” in Biologically Inspired Collaborative Computing (BICC), 2008, vol. 268, pp. 2313–222.
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2008 | Bachelorsthesis | LibreCat-ID: 10718
J. Niklas, Eine Monitoring- und Debugging-Infrastruktur für hybride HW/SW-Systeme. Paderborn University, 2008.
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2008 | Bachelorsthesis | LibreCat-ID: 10721
M. Östermann, Raytracing on a Custom Instruction Set CPU. Paderborn University, 2008.
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2008 | Bachelorsthesis | LibreCat-ID: 10751
N. Westerheide, Design and Evaluation of MicroBlaze Multi-core Architectures. Paderborn University, 2008.
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2008 | Conference Paper | LibreCat-ID: 10778
H. Ghasemzadeh Mohammadi, H. Tabkhi, S. G. Miremadi, and A. Ejlali, “A cost-effective error detection and roll-back recovery technique for embedded microprocessor control logic,” in 2008 International Conference on Microelectronics, 2008, pp. 444–447.
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2008 | Conference Paper | LibreCat-ID: 13629
H. Giefers and M. Platzner, “Realizing Reconfigurable Mesh Algorithms on Softcore Arrays,” in Proceedings of the International Symposium on Systems, Architectures, Modeling and Simulation (SAMOS), 2008.
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2008 | Conference Paper | LibreCat-ID: 13630
E. Lübbers and M. Platzner, “Communication and Synchronization in Multithreaded Reconfigurable Computing Systems,” in Proceedings of the 8th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2008.
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2008 | Conference Paper | LibreCat-ID: 13631
E. Lübbers and M. Platzner, “A portable abstraction layer for hardware threads,” in Proceedings of the 18th International Conference on Field Programmable Logic and Applications (FPL), 2008.
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2008 | Conference Paper | LibreCat-ID: 2364
T. Schumacher, R. Meiche, P. Kaufmann, E. Lübbers, C. Plessl, and M. Platzner, “A Hardware Accelerator for k-th Nearest Neighbor Thinning,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2008, pp. 245–251.
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2008 | Conference Paper | LibreCat-ID: 2372
T. Schumacher, C. Plessl, and M. Platzner, “IMORC: An infrastructure for performance monitoring and optimization of reconfigurable computers,” 2008.
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2007 | Conference Paper | LibreCat-ID: 6508
P. Kaufmann and M. Platzner, “MOVES: A Modular Framework for Hardware Evolution,” in Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), Edinburgh, UK, 2007, pp. 447–454.
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2007 | Mastersthesis | LibreCat-ID: 10623
T. Beisel, Entwurf und Evaluation eines parallelen Verfahrens zur Bildrekonstruktion in der Positronen-Emissions-Tomographie auf Multi-Core-Architekturen. Paderborn University, 2007.
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2007 | Journal Article | LibreCat-ID: 10625
N. Bergmann, M. Platzner, and J. Teich, “Dynamically Reconfigurable Architectures (editorial),” {EURASIP} Journal on Embedded Systems, vol. 2007, pp. 1–2, 2007.
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2007 | Bachelorsthesis | LibreCat-ID: 10643
T. Ceylan and C. Yalcin, Distributed Simulation of mobile Robots using EyeSim. Paderborn University, 2007.
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2007 | Journal Article | LibreCat-ID: 10646
K. Danne, R. Mühlenbernd, and M. Platzner, “Server-based execution of periodic tasks on dynamically reconfigurable hardware,” IET Computers Digital Techniques, vol. 1, no. 4, pp. 295–302, 2007.
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2007 | Mastersthesis | LibreCat-ID: 10647
B. Defo, A Comparison of Multi-Objective Evolutionary Algorithms for Automated Circuit Design and Optimization. Paderborn University, 2007.
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2007 | Mastersthesis | LibreCat-ID: 10648
S. Döhre, Entwurf und Implementierung einer RocketIO-basierten Kommunikationsschnittstelle für Multi-FPGA Systeme. Paderborn University, 2007.
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2007 | Conference Paper | LibreCat-ID: 10689
P. Kaufmann and M. Platzner, “Toward Self-adaptive Embedded Systems: Multi-objective Hardware Evolution,” in Architecture of Computing Systems (ARCS), 2007, vol. 4415, pp. 199–208.
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2007 | Bachelorsthesis | LibreCat-ID: 10709
R. Meiche, VHDL-Implementierung eines Clustering-Verfahrens für multikriterielle Optimierungsalgorithmen. Paderborn University, 2007.
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2007 | Mastersthesis | LibreCat-ID: 10728
W. Reisch, Bildverarbeitungs-Architekturen und -Bibliotheken für das rekonfigurierbare Betriebssystem ReconOS. Paderborn University, 2007.
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2007 | Mastersthesis | LibreCat-ID: 10729
E. Rethmeier, Konzeption und Implementierung einer Microsoft Windows CE 5.0 Plattform für ein ARM-basiertes eingebettetes Rechnersystem. Paderborn University, 2007.
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2007 | Conference Paper | LibreCat-ID: 10735
T. Schumacher, E. Lübbers, P. Kaufmann, and M. Platzner, “Accelerating the Cube Cut Problem with an FPGA-Augmented Compute Cluster,” in Proceedings of the ParaFPGA Symposium, International Conference on Parallel Computing: Architectures, Algorithms and Applications (PARCO), 2007, vol. 15, pp. 749–756.
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2007 | Conference Paper | LibreCat-ID: 13627
H. Giefers and M. Platzner, “A Many-Core Implementation Based on the Reconfigurable Mesh Model,” in Proceedings of the 17th International Conference on Field Programmable Logic and Applications (FPL), 2007.
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2007 | Conference Paper | LibreCat-ID: 13628
E. Lübbers and M. Platzner, “ReconOS: An RTOS Supporting Hard-and Software Threads,” in Proceedings of the 17th International Conference on Field Programmable Logic and Applications (FPL), 2007.
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2006 | Conference Paper | LibreCat-ID: 2401
C. Plessl, M. Platzner, and L. Thiele, “Optimal Temporal Partitioning based on Slowdown and Retiming,” in Proc. Int. Conf. on Field Programmable Technology (ICFPT), 2006, pp. 345–348.
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2006 | Conference Paper | LibreCat-ID: 10688
P. Kaufmann and M. Platzner, “Multi-objective Intrinsic Hardware Evolution,” in Intl. Conf. Military Applications of Programmable Logic Devices (MAPLD), 2006.
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2006 | Bachelorsthesis | LibreCat-ID: 10716
R. Mühlenbernd, FPGA-Implementierung eines server-basierten Schedulers für periodische Hardwaretasks. Paderborn University, 2006.
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2006 | Conference Paper | LibreCat-ID: 13624
K. Danne, R. Mühlenbernd, and M. Platzner, “Executing Hardware Tasks on Dynamically Reconfigurable Devices under Real-time Conditions,” in Proceedings of the 16th International Conference on Field Programmable Logic and Applications (FPL), 2006.
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2006 | Conference Paper | LibreCat-ID: 13625
K. Danne and M. Platzner, “An EDF Schedulability Test for Periodic Tasks on Reconfigurable Hardware Devices,” in In ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES), 2006.
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2006 | Conference Paper | LibreCat-ID: 13626
K. Danne and M. Platzner, “Partitioned Scheduling of Periodic Real-time Tasks onto Reconfigurable Hardware,” in Proceedings of the 13th Reconfigurable Architectures Workshop (RAW), 2006.
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2005 | Conference Paper | LibreCat-ID: 2411
C. Plessl and M. Platzner, “Zippy – A coarse-grained reconfigurable array with support for hardware virtualization,” in Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), 2005, pp. 213–218.
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2005 | Journal Article | LibreCat-ID: 2412
R. Enzler, C. Plessl, and M. Platzner, “System-level performance evaluation of reconfigurable processors,” Microprocessors and Microsystems, vol. 29, no. 2–3, pp. 63–73, 2005.
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2005 | Conference Paper | LibreCat-ID: 13621
K. Danne and M. Platzner, “Periodic real-time scheduling for FPGA computers,” in Proceedings of the Third International Workshop on Intelligent Solutions in Embedded Systems (WISES), 2005.
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2005 | Conference Paper | LibreCat-ID: 13622
K. Danne and M. Platzner, “Memory-demanding Periodic Real-time Applications on FPGA Computers,” in Work-in-Progress Proceedings of the 17th Euromicro Conference on Real-time Systems (ECRTS), 2005.
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2005 | Conference Paper | LibreCat-ID: 13623
K. Danne and M. Platzner, “A heuristic approach to schedule periodic real-time tasks on reconfigurable hardware,” in Proceedings of the 15th International Conference on Field Programmable Logic and Applications (FPL), 2005.
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2004 | Conference Paper | LibreCat-ID: 2415
C. Plessl and M. Platzner, “Virtualization of Hardware – Introduction and Survey,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2004, pp. 63–69.
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2004 | Journal Article | LibreCat-ID: 10742
C. Steiger, H. Walder, and M. Platzner, “Operating systems for reconfigurable embedded platforms: online scheduling of real-time tasks,” {IEEE} Transactions on Computers, vol. 53, no. 11, pp. 1393–1407, 2004.
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2004 | Conference Paper | LibreCat-ID: 13618
H. Walder and M. Platzner, “A Runtime Environment for Reconfigurable Hardware Operating Systems,” in Proceedings of the 14th International Conference on Field Programmable Logic and Applications (FPL), 2004, pp. 831–835.
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2004 | Conference Paper | LibreCat-ID: 13619
H. Walder, S. Nobs, and M. Platzner, “XF-BOARD: A Prototyping Platform for Reconfigurable Hardware Operating Systems,” in Proceedings of the 4th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2004.
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2004 | Conference Paper | LibreCat-ID: 13620
M. Dyer, M. Platzner, and L. Thiele, “Efficient Execution of Process Networks on a Reconfigurable Hardware Virtual Machine,” in Proceedings 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), 2004.
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2003 | Conference Paper | LibreCat-ID: 2418
C. Plessl and M. Platzner, “TKDM – A Reconfigurable Co-processor in a PC’s Memory Slot,” in Proc. Int. Conf. on Field Programmable Technology (ICFPT), 2003, pp. 252–259.
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2003 | Journal Article | LibreCat-ID: 2419
C. Plessl et al., “The Case for Reconfigurable Hardware in Wearable Computing,” Personal and Ubiquitous Computing, vol. 7, no. 5, pp. 299–308, 2003.
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2003 | Journal Article | LibreCat-ID: 2420
C. Plessl and M. Platzner, “Instance-Specific Accelerators for Minimum Covering,” Journal of Supercomputing, vol. 26, no. 2, pp. 109–129, 2003.
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2003 | Conference Paper | LibreCat-ID: 2421
R. Enzler, C. Plessl, and M. Platzner, “Virtualizing Hardware with Multi-Context Reconfigurable Arrays,” in Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 2003, vol. 2778, pp. 151–160.
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2003 | Conference Paper | LibreCat-ID: 2422
R. Enzler, C. Plessl, and M. Platzner, “Co-simulation of a Hybrid Multi-Context Architecture,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2003, pp. 174–180.
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2003 | Conference Paper | LibreCat-ID: 13612
H. Walder and M. Platzner, “Online scheduling for block-partitioned reconfigurable devices,” in Proceedings Design, Automation and Test in Europe Conference (DATE), 2003, pp. 290–295.
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2003 | Conference Paper | LibreCat-ID: 13613
H. Walder, C. Steiger, and M. Platzner, “Fast online task placement on FPGAs: free space partitioning and 2D-hashing,” in Proceedings International Parallel and Distributed Processing Symposium, 2003.
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2003 | Conference Paper | LibreCat-ID: 13614
H. Walder and M. Platzner, “Reconfigurable Hardware Operating Systems: From Design Concepts to Realizations,” in Proceedings of the 3rd International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2003, pp. 284–287.
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2003 | Conference Paper | LibreCat-ID: 13615
C. Steiger, H. Walder, and M. Platzner, “Heuristics for Online Scheduling Real-Time Tasks to Partially Reconfigurable Devices,” in Proceedings of the 13th International Conference on Field Programmable Logic and Applications (FPL), 2003, pp. 575–584.
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2003 | Conference Paper | LibreCat-ID: 13617
C. Steiger, H. Walder, M. Platzner, and L. Thiele, “Online scheduling and placement of real-time tasks to partially reconfigurable devices,” in Proceedings 24th IEEE International Real-Time Systems Symposium (RTSS), 2003, pp. 252–235.
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2002 | Conference Paper | LibreCat-ID: 2423
C. Plessl, R. Enzler, H. Walder, J. Beutel, M. Platzner, and L. Thiele, “Reconfigurable Hardware in Wearable Computing Nodes,” in Proc. Int. Symp. on Wearable Computers (ISWC), 2002, pp. 215–222.
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2002 | Conference Paper | LibreCat-ID: 2424
M. Dyer, C. Plessl, and M. Platzner, “Partially Reconfigurable Cores for Xilinx Virtex,” in Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 2002, vol. 2438, pp. 292–301.
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2002 | Conference Paper | LibreCat-ID: 2425
C. Plessl and M. Platzner, “Custom Computing Machines for the Set Covering Problem,” in Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), 2002, pp. 163–172.
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2002 | Journal Article | LibreCat-ID: 10651
M. Eisenring and M. Platzner, “A Framework for Run-time Reconfigurable Systems,” The Journal of Supercomputing, vol. 21, no. 2, pp. 145–159, 2002.
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2002 | Conference Paper | LibreCat-ID: 13611
H. Walder and M. Platzner, “Non-preemptive Multitasking on FPGAs: Task Placement and Footprint Transform,” in Proceedings of the 2nd International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2002, pp. 24–30.
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2001 | Conference Paper | LibreCat-ID: 2428
C. Plessl and M. Platzner, “Instance-Specific Accelerators for Minimum Covering,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2001, pp. 85–91.
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2001 | Conference Paper | LibreCat-ID: 2432
R. Enzler, M. Platzner, C. Plessl, L. Thiele, and G. Tröster, “Reconfigurable Processors for Handhelds and Wearables: Application Analysis,” in Reconfigurable Technology: FPGAs and Reconfigurable Processors for Computing and Communications III, 2001, vol. 4525, pp. 135–146.
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2001 | Journal Article | LibreCat-ID: 10713
O. Mencer, M. Platzner, M. Morf, and M. J. Flynn, “Object-oriented domain specific compilers for programming FPGAs,” {IEEE} Transactions on Very Large Scale Integration ({VLSI}) Systems, vol. 9, no. 1, pp. 205–210, 2001.
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2001 | Misc | LibreCat-ID: 13463
R. Enzler and M. Platzner, Dynamically Reconfigurable Processors. TELEMATIK, Zeitschrift des Telematik-Ingebieur-Verbandes 7(1), 2001.
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2000 | Journal Article | LibreCat-ID: 6507
M. Platzner, “Reconfigurable accelerators for combinatorial problems,” Computer, vol. 33, no. 4, pp. 58–60, 2000.
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2000 | Journal Article | LibreCat-ID: 10606
M. Eisenring and M. Platzner, “Synthesis of Interfaces and Communication in Reconfigurable Embedded Systems,” IEE Proceedings -- Computers & Digital Techniques, vol. 147, pp. 159–165, 2000.
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