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369 Publications


2012 | Journal Article | LibreCat-ID: 10685
Kaufmann P, Glette K, Platzner M, Torresen J. Compensating Resource Fluctuations by Means of Evolvable Hardware: The Run-Time Reconfigurable Functional Unit Row Classifier Architecture. International Journal of Adaptive, Resilient and Autonomic Systems (IJARAS). 2012;3(4):17-31. doi:10.4018/jaras.2012100102
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2012 | Conference Paper | LibreCat-ID: 2103
Wistuba M, Schaefers L, Platzner M. Comparison of Bayesian Move Prediction Systems for Computer Go. In: Proc. IEEE Conf. on Computational Intelligence and Games (CIG). IEEE; 2012:91-99. doi:10.1109/CIG.2012.6374143
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2012 | Journal Article | LibreCat-ID: 2108
Schumacher T, Plessl C, Platzner M. IMORC: An Infrastructure and Architecture Template for Implementing High-Performance Reconfigurable FPGA Accelerators. Microprocessors and Microsystems. 2012;36(2):110-126. doi:10.1016/j.micpro.2011.04.002
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2012 | Journal Article | LibreCat-ID: 2172
Thielemans K, Tsoumpas C, Mustafovic S, et al. STIR: Software for Tomographic Image Reconstruction Release 2. Physics in Medicine and Biology. 2012;57(4):867-883. doi:10.1088/0031-9155/57/4/867
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2012 | Journal Article | LibreCat-ID: 2177
Grad M, Plessl C. On the Feasibility and Limitations of Just-In-Time Instruction Set Extension for FPGA-based Reconfigurable Processors. Int Journal of Reconfigurable Computing (IJRC). 2012. doi:10.1155/2012/418315
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2012 | Conference Paper | LibreCat-ID: 567
Barrio P, Carreras C, Sierra R, Kenter T, Plessl C. Turning control flow graphs into function calls: Code generation for heterogeneous architectures. In: Proceedings of the International Conference on High Performance Computing and Simulation (HPCS). IEEE; 2012:559-565. doi:10.1109/HPCSim.2012.6266973
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2012 | Dissertation | LibreCat-ID: 586
Drzevitzky S. Proof-Carrying Hardware: A Novel Approach to Reconfigurable Hardware Security. Universität Paderborn; 2012.
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2012 | Conference Paper | LibreCat-ID: 10636
Boschmann A, Platzner M. Reducing classification accuracy degradation of pattern recognition based myoelectric control caused by electrode shift using a high density electrode array. In: Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC). ; 2012.
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2012 | Mastersthesis | LibreCat-ID: 10650
Dridger D. Design and Implementation of a Nanophotonics Simulation Personality for the Convey HC-1 Hybrid Core Computer. Paderborn University; 2012.
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2012 | Bachelorsthesis | LibreCat-ID: 10667
Hangmann H. Generating Adjustable Temperature Gradients on Modern FPGAs. Paderborn University; 2012.
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2012 | Journal Article | LibreCat-ID: 2173
Redif S, Kasap S. Parallel algorithm for computation of second-order sequential best rotations. Int Journal of Electronics. 2012;100(12):1646-1651. doi:10.1080/00207217.2012.751343
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2012 | Conference Paper | LibreCat-ID: 2180
Beisel T, Wiersema T, Plessl C, Brinkmann A. Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux. In: Proc. Workshop on Computer Architecture and Operating System Co-Design (CAOS). ; 2012.
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2012 | Misc | LibreCat-ID: 587
Plessl C, Platzner M, Agne A, Happe M, Lübbers E. Programming Models for Reconfigurable Heterogeneous Multi-Cores. Awareness Magazine; 2012.
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2012 | Conference Paper | LibreCat-ID: 2097
Kasap S, Redif S. FPGA-based design and implementation of an approximate polynomial matrix EVD algorithm. In: Proc. Int. Conf. on Field Programmable Technology (ICFPT). IEEE Computer Society; 2012:135-140. doi:10.1109/FPT.2012.6412125
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2012 | Conference Paper | LibreCat-ID: 2100
Kasap S, Redif S. FPGA implementation of a second-order convolutive blind signal separation algorithm. In: Int. Architecture and Engineering Symp. (ARCHENG). ; 2012.
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2012 | Journal Article | LibreCat-ID: 2174
Kasap S, Benkrid K. Parallel Processor Design and Implementation for Molecular Dynamics Simulations on a FPGA Parallel Computer. Journal of Computers. 2012;7(6):1312-1328.
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2012 | Conference Paper | LibreCat-ID: 615
Happe M, Hangmann H, Agne A, Plessl C. Eight Ways to put your FPGA on Fire – A Systematic Study of Heat Generators. In: Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig). IEEE; 2012:1-8. doi:10.1109/ReConFig.2012.6416745
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2012 | Bachelorsthesis | LibreCat-ID: 10734
Schmitz H. Stereo Matching on a HC-1 Hybrid Core Computer. Paderborn University; 2012.
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2012 | Dissertation | LibreCat-ID: 10652
Giefers H. Design and Programming of Reconfigurable Mesh Based Many-Cores. Berlin: Logos Verlag Berlin GmbH; 2012.
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2012 | Conference Paper | LibreCat-ID: 2106
Meyer B, Schumacher J, Plessl C, Förstner J. Convey Vector Personalities – FPGA Acceleration with an OpenMP-like Effort? In: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL). IEEE; 2012:189-196. doi:10.1109/FPL.2012.6339370
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