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40 Publications
2004 | Misc | LibreCat-ID: 13100
Hellebrand S, Wuertenberger A, S. Tautermann C. Data Compression for Multiple Scan Chains Using Dictionaries with Corrections. 9th IEEE European Test Symposium, Ajaccio, Corsica, France; 2004.
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2002 | Misc | LibreCat-ID: 13097
Hellebrand S, Wuertenberger A. Alternating Run-Length Coding: A Technique for Improved Test Data Compression. IEEE International Workshop on Test Resource Partitioning, Baltimore, MD, USA; 2002.
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2001 | Misc | LibreCat-ID: 13096
Liang H-G, Hellebrand S, Wunderlich H-J. Two-Dimensional Test Data Compression for Scan-Based Deterministic BIST. IEEE European Test Workshop, Stockholm, Sweden; 2001.
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2000 | Misc | LibreCat-ID: 13095
Hellebrand S, Liang H-G, Wunderlich H-J. A Mixed Mode BIST Scheme Based on Reseeding of Folding Counters. IEEE European Test Workshop, Cascais, Portugal; 2000.
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1999 | Misc | LibreCat-ID: 13093
Hellebrand S, Wunderlich H-J, N. Yarmolik V. Exploiting Symmetries to Speed Up Transparent BIST. 11th GI/ITG/GMM/IEEE Workshop; 1999.
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1998 | Misc | LibreCat-ID: 13091
N. Yarmolik V, Hellebrand S, Wunderlich H-J. Efficient Consistency Checking for Embedded Memories. 5th IEEE International Test Synthesis Workshop, Santa Barbara, CA, USA; 1998.
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1998 | Misc | LibreCat-ID: 13092
N. Yarmolik V, Hellebrand S, Wunderlich H-J. Efficient Consistency Checking for Embedded Memories. 10th GI/ITG/GMM/IEEE Workshop; 1998.
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1997 | Misc | LibreCat-ID: 13089
Tsai K-H, Hellebrand S, Rajski J, Marek-Sadowska M. STARBIST: Scan Autocorrelated Random Pattern Generation. 4th IEEE International Test Synthesis Workshop, Santa Barbara, CA, USA; 1997.
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1997 | Misc | LibreCat-ID: 13090
Hertwig A, Hellebrand S, Wunderlich H-J. Synthesis of Fast On-Line Testable Controllers for Data-Dominated Applications. 3rd IEEE International On-Line Testing Workshop, Crete, Greece; 1997.
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1996 | Misc | LibreCat-ID: 13087
Hellebrand S, Wunderlich H-J. Using Embedded Processors for BIST. 3rd IEEE International Test Synthesis Workshop, Santa Barbara, CA; 1996.
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1996 | Misc | LibreCat-ID: 13088
Hellebrand S, Wunderlich H-J, Hertwig A. Mixed-Mode BIST Using Embedded Processors. 2nd IEEE International On-Line Testing Workshop. Biarritz, France; 1996.
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1995 | Misc | LibreCat-ID: 13086
Hellebrand S, Reeb B, Tarnick S, Wunderlich H-J. Pattern Generation for a Deterministic BIST Scheme. 2nd IEEE International Test Synthesis Workshop, Santa Barbara, CA; 1995.
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1994 | Misc | LibreCat-ID: 13083
Venkataraman S, Rajski J, Hellebrand S, Tarnick S. Effiziente Testsatzkodierung Für Prüfpfad-Basierte Selbsttestarchitekturen. 6th ITG/GI/GME Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”, Vaals, The Netherlands; 1994.
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1994 | Misc | LibreCat-ID: 13084
Hellebrand S, Wunderlich H-J. Ein Verfahren Zur Testfreundlichen Steuerwerkssynthese. 6th ITG/GI/GME Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”, Vaals, The Netherlands; 1994.
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1994 | Misc | LibreCat-ID: 13085
Hellebrand S, Paulo Teixeira J, Wunderlich H-J. Synthesis for Testability - the ARCHIMEDES Approach. 1st IEEE International Test Synthesis Workshop, Santa Barbara, CA, USA; 1994.
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1993 | Misc | LibreCat-ID: 13081
Hellebrand S, Tarnick S, Rajski J, Courtois B. Effiziente Erzeugung Deterministischer Muster Im Selbsttest. 5th ITG/GI/GME Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”, Holzhau, Germany; 1993.
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1993 | Misc | LibreCat-ID: 13082
Hellebrand S, Wunderlich H-J. Synthesis of Self-Testable Controllers. ARCHIMEDES Open Workshop on “Synthesis - Architectural Testability Support”, Montpellier, France; 1993.
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1992 | Misc | LibreCat-ID: 13076
Hellebrand S, Tarnick S, Rajski J, Courtois B. Generation of Vector Patterns through Reseeding of Multiple-Polynomial LFSRs. IEEE Design for Testability Workshop, Vail, CO, USA; 1992.
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1992 | Misc | LibreCat-ID: 13080
Hellebrand S, Tarnick S, Rajski J, Courtois B. Generation of Vector Patterns through Reseeding of Multiple-Polynomial LFSRs. Workshop on New Directions for Testing, Montreal, Canada; 1992.
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1990 | Misc | LibreCat-ID: 13103
Hellebrand S, Wunderlich H-J, F. Haberl O. Generating Pseudo-Exhaustive Vectors for External Testing. IEEE Design for Testability Workshop, Vail, CO, USA; 1990.
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