7 Publications

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[7]
2020 | Conference Paper | LibreCat-ID: 19422
Sprenger A, Sadeghi-Kohan S, Reimer JD, Hellebrand S. Variation-Aware Test for Logic Interconnects using Neural Networks - A Case Study. In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT’20), October 2020. Virtual Conference - Originally Frascati (Rome), Italy.
LibreCat
 
[6]
2020 | Conference Paper | LibreCat-ID: 19421
Holst S, Kampmann M, Sprenger A, et al. Logic Fault Diagnosis of Hidden Delay Defects. In: IEEE International Test Conference (ITC’20), November 2020. Virtual Conference - Originally Washington, DC.
LibreCat
 
[5]
2019 | Misc | LibreCat-ID: 8112
Maaz MU, Sprenger A, Hellebrand S. A Hybrid Space Compactor for Varying X-Rates. Prien am Chiemsee: 31. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’19); 2019.
LibreCat
 
[4]
2019 | Journal Article | LibreCat-ID: 8667
Sprenger A, Hellebrand S. Divide and Compact - Stochastic Space Compaction for Faster-than-At-Speed Test. Journal of Circuits, Systems and Computers. 2019;28(1):1-23. doi:10.1142/s0218126619400012
LibreCat | DOI
 
[3]
2019 | Conference Paper | LibreCat-ID: 12918
Maaz MU, Sprenger A, Hellebrand S. A Hybrid Space Compactor for Adaptive X-Handling. In: 50th IEEE International Test Conference (ITC). Washington, DC, USA: IEEE; 2019:1-8.
LibreCat
 
[2]
2018 | Misc | LibreCat-ID: 4576
Sprenger A, Hellebrand S. Stochastische Kompaktierung für den Hochgeschwindigkeitstest. Freiburg, Germany: 30. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’18); 2018.
LibreCat
 
[1]
2018 | Conference Paper | LibreCat-ID: 4575
Sprenger A, Hellebrand S. Tuning Stochastic Space Compaction to Faster-than-at-Speed Test. In: 2018 IEEE 21st International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS). Budapest: IEEE; 2018. doi:10.1109/ddecs.2018.00020
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7 Publications

Mark all

[7]
2020 | Conference Paper | LibreCat-ID: 19422
Sprenger A, Sadeghi-Kohan S, Reimer JD, Hellebrand S. Variation-Aware Test for Logic Interconnects using Neural Networks - A Case Study. In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT’20), October 2020. Virtual Conference - Originally Frascati (Rome), Italy.
LibreCat
 
[6]
2020 | Conference Paper | LibreCat-ID: 19421
Holst S, Kampmann M, Sprenger A, et al. Logic Fault Diagnosis of Hidden Delay Defects. In: IEEE International Test Conference (ITC’20), November 2020. Virtual Conference - Originally Washington, DC.
LibreCat
 
[5]
2019 | Misc | LibreCat-ID: 8112
Maaz MU, Sprenger A, Hellebrand S. A Hybrid Space Compactor for Varying X-Rates. Prien am Chiemsee: 31. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’19); 2019.
LibreCat
 
[4]
2019 | Journal Article | LibreCat-ID: 8667
Sprenger A, Hellebrand S. Divide and Compact - Stochastic Space Compaction for Faster-than-At-Speed Test. Journal of Circuits, Systems and Computers. 2019;28(1):1-23. doi:10.1142/s0218126619400012
LibreCat | DOI
 
[3]
2019 | Conference Paper | LibreCat-ID: 12918
Maaz MU, Sprenger A, Hellebrand S. A Hybrid Space Compactor for Adaptive X-Handling. In: 50th IEEE International Test Conference (ITC). Washington, DC, USA: IEEE; 2019:1-8.
LibreCat
 
[2]
2018 | Misc | LibreCat-ID: 4576
Sprenger A, Hellebrand S. Stochastische Kompaktierung für den Hochgeschwindigkeitstest. Freiburg, Germany: 30. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’18); 2018.
LibreCat
 
[1]
2018 | Conference Paper | LibreCat-ID: 4575
Sprenger A, Hellebrand S. Tuning Stochastic Space Compaction to Faster-than-at-Speed Test. In: 2018 IEEE 21st International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS). Budapest: IEEE; 2018. doi:10.1109/ddecs.2018.00020
LibreCat | DOI
 

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